Array substrate, display panel, display apparatus, and method for producing array substrate

US10133096B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10133096-B2
Application numberUS-201515126704-A
CountryUS
Kind codeB2
Filing dateOct 16, 2015
Priority dateJun 30, 2015
Publication dateNov 20, 2018
Grant dateNov 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention provides an array substrate comprising a transparent substrate and a polarizer attached on the transparent substrate, the polarizer comprises a first protective layer in contact with the transparent substrate, and a relational expression is satisfied between the first protective layer and the transparent substrate, 0≤|C|≤1.0×10 −13 , wherein C is defined by the equation C = C 100 ⁢ ρ 100 ⁢ d 100 ρ 100 ⁢ d 100 + ρ 200 ⁢ d 200 + C 200 ⁢ ρ 200 ⁢ d 200 ρ 100 ⁢ d 100 + ρ 200 ⁢ d 200 . When designing an array substrate provided by this invention, it is not required to consider the improvement of the material of the polarizer, and it may be ensured that the change of photoelastic birefringence of a finally formed array substrate is zero (or close to zero) in the case of being subjected to stress by only adjusting the thickness of a first protective layer or the material of the first protective layer, such that the phenomenon of light leakage of a finally formed liquid crystal display panel generated due to photoelastic birefringence may be eliminated or reduced. This invention further provides a display panel, a display apparatus, and a method for producing an array substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. An array substrate comprising a transparent substrate and a polarizer which is attached on the transparent substrate and comprises a first protective layer in contact with the transparent substrate, wherein the first protective layer and the transparent substrate satisfy the following relational expression: 0≤|C|≤1.0×10 −13 Pa −1 in which C is a comprehensive photoelastic coefficient, and is defined by the following equation (1): C = C 100 ⁢ ρ 100 ⁢ d 100 ρ 100 ⁢ d 100 + ρ 200 ⁢ d 200 + C 200 ⁢ ρ 200 ⁢ d 200 ρ 100 ⁢ d 100 + ρ 200 ⁢ d 200 ( 1 ) in which C100 is the photoelastic coefficient of the transparent substrate; ρ100 is the density of the transparent substrate; d100 is the thickness of the transparent substrate; C 200 is the photoelastic coefficient of the first protective layer; ρ200 is the density of the first protective layer; and d200 is the thickness of the first protective layer, wherein the material, from which the first protective layer is produced, is a mixture of a matrix material and an additive such that the photoelastic coefficient of the first protective layer satisfies the relational expression. 2. The array substrate according to claim 1 , wherein the matrix material is cellulose triacetate or a cycloolefin copolymer, and the additive is any one of methyl methacrylate, trifluoroethyl methacrylate, trichloroethyl methacrylate, benzyl methacrylate, trim ethylcyclohexyl methacrylate, and pentafluorophenyl methacrylate. 3. The array substrate according to claim 1 , wherein the transparent substrate has a photoelastic coefficient of (0.5−3)×10 −12 Pa −1 . 4. The array substrate according to claim 3 , wherein the polarizer further comprises a second protective layer and a polarizing layer sandwiched between the first protective layer and the second protective layer, and the material of the polarizing layer is polystyrene-modified cellulose triacetate or a cycloolefin copolymer. 5. The array substrate according to claim 1 , wherein the transparent substrate has a thickness of 100 to 300 μm, and the first protective layer has a thickness of 65 to 85 μm. 6. A display panel comprising an array substrate as claimed in claim 1 . 7. The display panel according to claim 6 , wherein the array substrate comprises a pixel circuit, and the pixel circuit is provided on a surface of the transparent substrate where the first protective layer is not provided. 8. The display panel according to claim 6 , wherein the array substrate comprises a color filter layer, and the color filter layer is provided on a surface of the transparent substrate where the first protective layer is not provided. 9. A display apparatus comprising the display panel as claimed in claim 6 . 10. A method for producing an array substrate comprising a transparent substrate and a polarizer attached on the transparent substrate, comprising: providing the transparent substrate, which has a photoelastic coefficient of C100, a density of ρ00, and a thickness of d100; providing the polarizer on the transparent substrate, wherein the polarizer comprises a first protective layer in contact with the transparent substrate, wherein a photoelastic coefficient C 200 , a density ρ200, and a thickness d 200 of the first protective layer are set so as to satisfy a relational expression 0≤|C|≤1.0×10 −13 Pa −1 , in which C is a comprehensive photoelastic coefficient, and is defined by the following equation (1): C = C 100 ⁢ ρ 100 ⁢ d 100 ρ 100 ⁢ d 100 + ρ 200 ⁢ d 200

Assignees

Inventors

Classifications

  • G02F1/0131Primary

    based on photo-elastic effects, e.g. mechanically induced birefringence · CPC title

  • Polarisers · CPC title

  • Colour selective polarisers (G02F1/1347 takes precedence) · CPC title

  • Protective coatings, e.g. hard coatings · CPC title

  • in the form of a thin sheet or foil, e.g. Polaroid · CPC title

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What does patent US10133096B2 cover?
The present invention provides an array substrate comprising a transparent substrate and a polarizer attached on the transparent substrate, the polarizer comprises a first protective layer in contact with the transparent substrate, and a relational expression is satisfied between the first protective layer and the transparent substrate, 0≤|C|≤1.0×10 −13 , wherein C is defined by the equation …
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/0131. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).