Relay protection method and apparatus against LC parallel circuit detuning faults

Patent metadata

Field	Value
Publication number	US-10128650-B2
Application number	US-201515305183-A
Country	US
Kind code	B2
Filing date	Jan 8, 2015
Priority date	Apr 29, 2014
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

A relay protection method against LC parallel circuit detuning faults comprises the steps of: a relay protection device samples a current of a parallel LC, that is, a reactor and a capacitor, and samples a total current flowing through the whole LC; convert the current of the reactor into a current of an equivalent capacitor; calculate amplitudes of the current of the equivalent capacitor and a current of a realistic capacitor and calculate an amplitude of the total current flowing through the LC; calculate a current amplitude ratio of the equivalent capacitor to the realistic capacitor; and when the amplitude of the total current flowing through the LC is large enough, send an alarm signal or a trip after a setting time delay if the current ratio exceeds a preset upper and lower limit range. Also provided is a corresponding relay protection device.

First claim

What is claimed is:

1. A relay protection method against LC parallel circuit detuning faults, comprising:
(1) sampling, by a relay protection device, a current of a parallel reactor, sampling a current of a parallel capacitor, and sampling a total current flowing through the LC parallel circuit;
(2) converting the current of the reactor into a current of an equivalent capacitor;
(3) calculating amplitudes of the current of the equivalent capacitor and a current of a realistic capacitor and calculating an amplitude of the current flowing through the LC parallel circuit;
(4) calculating a current amplitude ratio of the equivalent capacitor to the realistic capacitor; and
(5) when the amplitude of the total current flowing through the LC parallel circuit is large enough, sending an alarm signal or a trip after a setting time delay if the current amplitude ratio exceeds a preset upper and lower limit range.

2. The relay protection method against LC parallel circuit detuning faults according to claim 1 , wherein the step (2) further comprises: converting the current of the reactor into the current of an equivalent capacitor by differentiation, wherein the formula adopted is:

i
Ceq

⁡

(
n
)

=

n

CT
,
L

n

CT
,
C

⁢

[

LC
⁢

i
L

⁡

(
n
)

-

2
⁢

i
L

⁡

(

n
-
1

)

+

i
L

⁡

(

n
-
2

)

T
s
2

+

RC
⁢

i
L

⁡

(
n
)

-

i
L

⁡

(

n
-
1

)

T
s

]

wherein, i L is the current of the reactor, i Ceq is the current of the equivalent capacitor, n CT,L and n CT,C are a current conversion ratio of current transformers of a reactor subcircuit and a capacitor subcircuit in the LC parallel circuit respectively, L is an inductance value of the reactor, R is an equivalent resistance value of the reactor subcircuit, C is a capacitance value of the capacitor and T s is a sampling time interval, and n is a serial number of a discrete current signal.

3. The relay protection method against LC parallel circuit detuning faults according to claim 2 , wherein the step (3) further comprises: only calculating current amplitudes of working frequency fundamental waves regarding the LC parallel circuit detuning protection of blocking filters, a sampling frequency f s being a value ranging from 1200 Hz-2400 Hz; and calculating the current amplitudes of 12-order, 24-order and 36-order harmonics waves regarding the LC parallel circuit detuning protection for dual-tuning and tri-tuning DC filters, a higher sampling frequency f s being a value ranging from 4800 Hz-10 kHz, T s being equal to 1/f s .

4. The relay protection method against LC par

Assignees

• Nr Electric Co Ltd
• Nr Electric Eng Co Ltd

Inventors

• Zhang Qixue
• Xu Baoli
• Zhang Jie
• Li Huazhong
• Ji Yaoyao
• Zhong Shouping
• Wang Guang
• Chen Jun
• Yan Wei

Classifications

• H02J3/0014 Primary

  for preventing or reducing power oscillations in networks · CPC title

• H02H7/06

  for dynamo-electric generators; for synchronous capacitors · CPC title

• H02J1/02

  Arrangements for reducing harmonics or ripples · CPC title

• Y02E40/40

  Arrangements for reducing harmonics · CPC title

• H02H7/267

  for parallel lines and wires · CPC title