Optoelectronic component and method for the production thereof

Patent metadata

Field	Value
Publication number	US-10128405-B2
Application number	US-99662209-A
Country	US
Kind code	B2
Filing date	Jun 3, 2009
Priority date	Jun 6, 2008
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

A method of producing an optoelectronic component, comprising the method steps: A) providing a growth substrate ( 1 ); B) growing at least one semiconductor layer ( 2 ) epitaxially, to produce an operationally active zone; C) applying a metallic mirror layer ( 3 ) to the semiconductor layer ( 2 ); D) applying at least one contact layer ( 8 ) for electronic contacting of the component; E) detaching the growth substrate ( 1 ) from the semiconductor layer ( 2 ), so exposing a surface of the semiconductor layer ( 2 ); and F) structuring the semiconductor layer ( 2 ) by means of an etching method from the side of the surface which was exposed in method step E).

First claim

The invention claimed is:

1. A method of producing an optoelectronic component, comprising the steps of:
A) providing a growth substrate;
B 1 ) growing a semiconductor layer sequence epitaxially comprising a plurality of semiconductor layers and an operationally active zone;
B 2 ) applying a low refractive index dielectric to the semiconductor layer sequence;
B 3 ) structuring the low refractive index dielectric so that the low refractive index dielectric is removed in sub-regions;
C 1 ) applying a metallic mirror layer to the semiconductor layer sequence and to the low refractive index dielectric so that a side of the metallic mirror layer facing the semiconductor layer sequence is structured and the metallic mirror layer penetrates the low refractive index dielectric in the sub-regions where the low refractive index dielectric has been removed so that the metallic mirror layer extends as far as the semiconductor layer sequence;
C 2 ) removing a sub-region of the metallic mirror layer and applying a diffusion barrier layer to the metallic mirror layer so that the diffusion barrier layer extends as far as the low refractive index dielectric;
D) applying at least one contact layer for electronic contacting of the component;
E) detaching the growth substrate from the semiconductor layer sequence, for exposing a surface of the at least one semiconductor layer; and
F) structuring the semiconductor layer sequence via an etching method from the side of the surface which was exposed in method step E), wherein trenches are produced, by means of which the semiconductor layer sequence is subdivided into a plurality of sub-regions, wherein the trenches penetrate the semiconductor layer sequence in a direction towards the metallic mirror layer completely.

2. The method according to claim 1 , wherein the cross-sections of the trenches produced in method step F) taper from the surface exposed in method step E) towards the metallic mirror layer.

3. The method according to claim 1 , further comprising the following method steps between method steps C 2 ) and D):
G) applying a passivation layer to the diffusion barrier layer.

4. The method according to claim 1 , wherein the layer sequence produced in method steps A) to F) is applied to a carrier, which is produced by a method comprising the steps of:
I 1 ) providing a carrier wafer;
I 2 ) applying a barrier layer to the carrier wafer; and
I 3 ) applying a bonding layer to the barrier layer.

5. The method according to claim 1 , further comprising, after method step F), step J 1 ) roughening the structured semiconductor layer sequence.

6. The method according to claim 5 , further comprising, after method step J 1 ), step J 2 ) coating the roughened semiconductor layer sequence with a top coat which is transmissive for visible radiation, UV radiation, IR radiation, or any combination of these radiations.

7. The method according to claim 6 , further comprising, after method step J 2 ), step J 3 ) structuring the top coat.

8. The method according to claim 7 , further comprising, after method step J 3 ), step J 4 ) applying an electrical contact to a sub-region of the semiconductor layer sequence re-exposed by the structuring of the top coat.

9. A method of producing an optoelectronic component, comprising the steps of:
A) providing a growth substrate;
B 1 ) growing a semiconductor layer sequence epitaxially, comprising a plurality of semiconductor layers and an operationally active zone;
B 2 ) applying a low refractive index dielectric to the semiconductor layer sequence;
B 3 ) structuring the low refractive index dielectric, wherein the low refractive index dielectric is removed in sub-regions;
C 1 ) applying a metallic mirror layer to the semiconductor layer sequence and to the low refractive index dielectric so that the side of the metallic mirror layer facing the semiconductor layer sequence is structured and the metallic mirror layer penetrates the low refractive index dielectric in the sub-regions where the low refractive index dielectric has been removed such that the metallic mirror layer extends as far as the semiconductor layer sequence;
C 2 ) removing a sub-region of the metallic mirror layer and applying a diffusion barrier layer to the metallic mirror layer such that the diffusion barrier layer extends as far as the low refractive index dielectric;
D) applying at least one contact layer for electrical contacting of the component; and
E) detaching the growth substrate from the semiconductor layer sequence for exposing a surface of the semiconductor layer sequence, wherein at least one mesa trench is formed in the semiconductor layer sequence from the side of the exposed surface of the semiconductor layer sequence only after the step of detaching the growth substrate from the semiconductor layer sequence, wherein the trench penetrates the semiconductor layer sequence in a direction towards the metallic mirror layer completely.

10. The method according to claim 9 , wherein the at least one mesa trench is formed by an wet etching method such that the at least one mesa trench tapers when viewed from the exposed surface of the semiconductor layer sequence towards the mirror layer.

11. The method according to claim 9 , wherein a plurality of trenches are formed in the semiconductor layer sequence only after the step of detaching the growth substrate from the semiconductor layer sequence in such a way that the trenches penetrate the semiconductor layer sequence so that the semiconductor layer sequence is subdivided into a plurality of sub-regions by means of the plurality of the trenches.

12. The method according to claim 11 , wherein the exposed surface of the semiconductor layer sequence is roughened and then provided with a top coat, said top coat also extending into the trenches and being formed of bisbenzocyclobutene.

13. The method according to claim 1 , wherein SiO 2 is used for the low refractive index dielectric.

14. The method according to claim 1 , wherein the low refractive index dielectric has a refractive index of 1.553 or less.

Assignees

• Kaiser Stephan
• Ploessl Andreas
• Osram Opto Semiconductors Gmbh

Inventors

• Kaiser Stephan
• Ploessl Andreas

Classifications

• H01L33/20

  Electricity · mapped topic

• H01L2924/00

  Electricity · mapped topic

• H01L2924/0002

  Electricity · mapped topic

• H01L33/405

  Electricity · mapped topic

• H01L33/0079 Primary

  Electricity · mapped topic