Electroluminescent display

Patent metadata

Field	Value
Publication number	US-10127859-B2
Application number	US-201715621866-A
Country	US
Kind code	B2
Filing date	Jun 13, 2017
Priority date	Dec 29, 2016
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

An electroluminescent display is disclosed. An electroluminescent display comprises a display panel including a plurality of pixels, each of the plurality of pixels including subpixels. A pixel circuit of each subpixels includes a driving transistor configured to drive the electroluminescent diode, a first switching transistor configured to supply a first voltage to a gate of the driving transistor in response to a first scan signal, a second switching transistor configured to supply a second voltage to the gate of the driving transistor in response to a second scan signal, a third switching transistor configured to supply the second voltage to a first electrode of the driving transistor in response to the second scan signal, a fourth switching transistor configured to supply a first supply voltage to a second electrode of the driving transistor in response to an emission control signal, a first capacitor between a first node connected to the gate electrode of the driving transistor and a second node connected to the second electrode of the driving transistor, and a second capacitor between the second node and a power supply line supplied with the second voltage or the first supply voltage.

First claim

What is claimed is:

1. An electroluminescent display comprising:
a display panel including a plurality of pixels, each of the plurality of pixels including subpixels,
wherein a pixel circuit of each subpixel includes:
a driving transistor connected to an anode of an electroluminescent diode, the driving transistor configured to drive the electroluminescent diode;
a first switching transistor connected to the driving transistor, the first switching transistor configured to supply a first voltage to a gate electrode of the driving transistor in response to a first scan signal;
a second switching transistor connected to the driving transistor, the second switching transistor configured to supply a second voltage to the gate electrode of the driving transistor in response to a second scan signal;
a third switching transistor connected to the second switching transistor and the driving transistor, the third switching transistor configured to supply the second voltage to a first electrode of the driving transistor in response to the second scan signal;
a fourth switching transistor connected to the driving transistor, the fourth switching transistor configured to supply a first supply voltage to a second electrode of the driving transistor in response to an emission control signal;
a first capacitor connected between a first node that is connected to the gate electrode of the driving transistor and a second node that is connected to the second electrode of the driving transistor; and
a second capacitor connected between the second node and a power supply line supplied with the second voltage or the first supply voltage,
wherein a second supply voltage is applied to a cathode of the electroluminescent diode, the second supply voltage lower than the first supply voltage.

2. The electroluminescent display of claim 1 , wherein a change in the first supply voltage is reflected both at the first node and the second node during a sampling period for sensing a threshold voltage of the driving transistor or during an emission period of the electroluminescent display during which the electroluminescent diode emits light.

3. The electroluminescent display of claim 1 , wherein the first voltage is a data voltage synchronized with the first scan signal,
wherein the second voltage is a reference voltage that is greater than the second supply voltage and is less than first supply voltage, and
wherein the first scan signal is a nth scan signal, and the second scan signal is a (n−1)th scan signal before the first scan signal, where n is a positive integer.

4. The electroluminescent display of claim 1 , wherein the first voltage is a reference voltage that is greater than the second supply voltage and is less than the first supply voltage,
wherein the second voltage is a data voltage synchronized with the first scan signal, and
wherein the first scan signal is a (n+1)th scan signal, and the second scan signal is an nth scan signal generated before the first scan signal, where n is a positive integer.

5. The electroluminescent display of claim 1 ,
wherein the second switching transistor and the third switching transistor are turned on in accordance with a gate-on voltage of the second scan signal,
wherein the first switching transistor is turned on in accordance with a gate-on voltage of the first scan signal,
wherein after the first switching transistor, the second switching transistor, and the third switching transistor are turned off, the fourth switching transistor is turned on in accordance with a gate-on voltage of the emission control signal, and
wherein the fourth switching transistor maintains an off-state during an off-period of the emission control signal.

6. The electroluminescent display of claim 1 , wherein the first switching transistor and the second switching transistor each include a dual gate structure.

7. The electroluminescent display of claim 1 , wherein the second scan signal is applied to (n−1)th subpixels and is synchronized with a (n−1)th data voltage, where n is a positive integer,
wherein the first scan signal is applied to nth subpixels and is synchronized with an nth data voltage, and
wherein the first scan signal is supplied to the pixel circuit subsequent to the second scan signal.

8. The electroluminescent display of claim 1 , wherein a pulse width of the second scan signal is longer in duration than a pulse width of the first scan signal.

9. The electroluminescent display of claim 1 , wherein the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, and the driving transistor are p-type transistors.

10. The electroluminescent display of claim 7 , further comprising:
a scan driver configured to output the second scan signal and the first scan signal;
an emission driver configured to output the emission control signal; and
a plurality of display lines connected to the subpixels,
wherein one output terminal of the scan driver is connected to a pair of subpixels arranged on two adjacent display lines of the plurality of display lines.

11. The electroluminescent display of claim 10 , wherein one output terminal of the emission driver is connected to the pair of subpixels arranged on two adjacent display lines of the plurality of display lines.

12. The electroluminescent display of claim 8 , further comprising:
a first scan driver configured to output the second scan signal;
a second scan driver configured to output the first scan signal;
an emission driver configured to output the emission control signal; and
a plurality of display lines connected to the subpixels,
wherein the first scan driver and the second scan driver share a common start pulse and the first scan driver and the second scan driver receive shift clocks having different pulse widths.

13. The electroluminescent display of claim 12 , wherein one output terminal of the emission driver is connected to a pair of subpixels arranged on two adjacent display lines of the plurality of display lines.

14. The electroluminescent display of claim 1 , further comprising:
a third capacitor connected between the first node and a third node, the third node connected to a gate electrode of the fourth switching transistor and a signal line supplied with the emission control signal.

15. The electroluminescent display of claim 1 , wherein at least one of the first switching transistor, the second switching transistor, the third switching transistor, and the fourth switching transistor is a n-type oxide transistor, and
wherein the driving transistor is a p-type polysilicon transistor.

16. An electroluminescent display comprising:
a display panel including a plurality of pixels, each of the plurality of pixels including subpixels,
wherein a pixel circuit of each subpixel includes:
a driving transistor connected to an anode of an electroluminescent diode, the driving transistor configured to drive the electroluminescent diode;
a switching circuit configured to supply a reference voltage that is less than a first supply voltage and greater than a second supply voltage that is less than the first supply voltage to a gate electrode and a first electrode of the driving transistor in response to a (n−1)th scan signal, the switching circuit configured to supply a data voltage to the gate electrode of the driving transistor in response to an nth scan signal, and the switching circuit configured to supply the first supply voltage to a second electrode of the driving transistor in response to an emission control signal, where n is a positive

Assignees

• Lg Display Co Ltd

Inventors

• Chang Sungwook
• Yoo Juhnsuk
• Kim Jungchul
• Yoon Sungwook
• Ko Hoyoung

Classifications

• G09G2320/0252

  Improving the response speed · CPC title

• G09G2320/045

  Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

• H01L27/3262

  Electricity · mapped topic

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title