Compiler system for a processor with an expandable instruction set architecture for dynamically configuring execution resources

Patent metadata

Field	Value
Publication number	US-10127041-B2
Application number	US-201615371452-A
Country	US
Kind code	B2
Filing date	Dec 7, 2016
Priority date	Dec 8, 2015
Publication date	Nov 13, 2018
Grant date	Nov 13, 2018

Abstract

A compiler system that converts an application source program into an executable program according to a predetermined ISA executable by a general purpose processor. The processor includes a PEU that is programmable to execute a UDI. The compiler system includes a PEU programming tool that converts a functional description of a processing operation to be performed by the PEU of the processor into programming information for programming the PEU to perform the processing operation in response to the specified UDI. The compiler system includes a compiler that converts the application source program into the executable program, which includes an optimization routine that represents a portion of the application source program with the specified UDI and that inserts the UDI into the executable program, and that further inserts into the executable program a UDI load instruction that specifies the UDI and a location of the programming information in the executable program.

First claim

The invention claimed is:

1. A compiler system for converting an application source program into an executable program according to a predetermined instruction set architecture (ISA) that is executable by a general purpose processor implemented according to the predetermined ISA, in which the processor includes a programmable execution unit (PEU) that is programmable to execute a specified user-defined instruction (UDI) received by the processor for execution, said compiler system comprising:
a PEU programming tool that converts a functional description of a processing operation to be performed by the PEU of the processor into programming information for programming the PEU to perform the processing operation in response to the specified UDI; and
a compiler that converts the application source program into the executable program, wherein said compiler comprises at least one optimization routine that represents a portion of the application source program with the specified UDI and that inserts the UDI into the executable program, and that further inserts into the executable program a UDI load instruction that specifies the UDI and said programming information,
wherein the programming information comprises a latency statement indicating the latency of the processing operation by a number of clock cycles to complete the processing operation,
wherein the processor further includes a UDI loader and an ISA table, the UDI loader programming the PEU for the specified UDI in response to the UDI load instruction by accessing the programming information, wherein the UDI loader accesses the programming information by a programming information address field corresponding to the specified UDI in the ISA table that points to a location of the programming information in memory.

2. The compiler system of claim 1 , wherein said compiler consults said PEU programming tool to incorporate the UDI and corresponding programming information into the executable program.

3. The compiler system of claim 1 , wherein said compiler uses said at least one optimization routine to generate said functional description of a processing operation.

4. The compiler system of claim 1 , wherein said executable program includes a standard program that only includes instructions from the predetermined ISA and that does not include the specified UDI, and wherein said executable program further includes a custom program that includes the specified UDI and said programming information.

5. The compiler system of claim 1 , wherein said compiler incorporates said programming information as UDI information into the application source program to provide a modified application source program, and then compiles said modified application source program into the executable program.

6. The compiler system of claim 1 , wherein said PEU programming tool generates an output comprising UDI definitions and corresponding programming information, and wherein said compiler incorporates said output of said PEU programming tool as UDI information into the application source program to provide a modified application source program, and then compiles said modified application source program into the executable program.

7. The compiler system of claim 6 , wherein said output of said PEU programming tool comprises a header file.

8. The compiler system of claim 1 , wherein said compiler links to said programming information during compilation of the application source program into the executable program.

9. The compiler system of claim 1 , wherein said PEU programming tool generates an output comprising UDI definitions and corresponding programming information, and wherein said compiler links to said output of said PEU programming tool during compilation of the application source program into the executable program.

10. The compiler system of claim 9 , wherein said output of said PEU programming tool comprises a header file.

11. A method of compiling an application source program into an executable program according to a predetermined instruction set architecture (ISA) that is executable by a general purpose processor implemented according to the predetermined ISA, in which the processor includes a programmable execution unit (PEU) that is programmable to execute a specified user-defined instruction (UDI) received by the processor for execution, said method comprising:
converting a functional description of a processing operation to be performed by the PEU of the processor into programming information for programming the PEU to perform the processing operation in response to the specified UDI; and
compiling the application source program into the executable program, including representing a portion of the application source program with the specified UDI, inserting the UDI into the executable program, and further inserting into the executable program a UDI load instruction that specifies the UDI and the programming information,
wherein the programming information comprises a latency statement indicating the latency of the processing operation by a number of clock cycles to complete the processing operation,
wherein the processor further includes a UDI loader and an ISA table, the UDI loader programming the PEU for the specified UDI in response to the UDI load instruction by accessing the programming information, wherein the UDI loader accesses the programming information by a programming information address field corresponding to the specified UDI in the ISA table that points to a location of the programming information in memory.

12. The method of claim 11 , wherein said converting a functional description of a processing operation comprises consulting a PEU programming tool.

13. The method of claim 11 , wherein said compiling the application source program comprises using at least one optimization routine to generate the functional description of the processing operation.

14. The method of claim 11 , wherein said compiling the application source program into the executable program includes compiling the application source program into a standard program that only includes instructions from the predetermined ISA and that does not include the specified UDI, and compiling the application source program into a custom program that includes the specified UDI and the programming information.

15. The method of claim 11 , wherein said compiling the application source program into the executable program comprises incorporating the programming information as UDI information into the application source program to provide a modified application source program, and then compiling the modified application source program into the executable program.

16. The method of claim 11 , wherein said converting comprises generating an output comprising UDI definitions and corresponding programming information, and wherein said compiling comprises incorporating the output as UDI information into the application source program to provide a modified application source program, and then compiling the modified application source program into the executable program.

17. The method of claim 16 , wherein said generating an output comprises generating a header file.

18. The method of claim 11 , wherein said compiling comprises linking to the programming information while compiling the application source program into the executable program.

19. The method of claim 11 , wherein said converting comprises generating an output comprising UDI definitions and corresponding programming information, and wherein said compiling comprises linking to the output

Assignees

• Via Alliance Semiconductor Co Ltd

Inventors

• Henry G Glenn
• Hooker Rodney E
• Parks Terry
• Reed Douglas R

Classifications

• G06F9/4496

  Unification in logic programming · CPC title

• G06F9/4482

  Procedural · CPC title

• G06F9/3836

  Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution · CPC title

• G06F9/30196 Primary

  using decoder, e.g. decoder per instruction set, adaptable or programmable decoders · CPC title

• G06F9/30185

  according to one or more bits in the instruction, e.g. prefix, sub-opcode · CPC title