Multilayer ceramic capacitor

Patent metadata

Field	Value
Publication number	US-10121596-B2
Application number	US-201615368717-A
Country	US
Kind code	B2
Filing date	Dec 5, 2016
Priority date	Dec 11, 2015
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

A multilayer ceramic capacitor includes a laminated body including multiple ceramic layers. On the ceramic layers, first internal electrodes and second internal electrodes are arranged spaced away from each other, and exposed at a second principal surface of the laminated body. On the ceramic layers which are different from the ceramic layers on which the first internal electrodes are disposed, first auxiliary conductors, second auxiliary conductors, and third auxiliary conductors are disposed, and the second auxiliary conductors and the third auxiliary conductors are exposed from the first principal surface. A first external electrode connected to the first internal electrodes and the second auxiliary conductors and a second external electrode connected to the second internal electrodes and the third auxiliary conductors are disposed on the second principal surface.

First claim

What is claimed is:

1. A multilayer ceramic capacitor comprising:
a laminated body that includes a plurality of ceramic layers laminated, first and second principal surfaces which are opposed to each other, first and second side surfaces which are opposed to each other in a laminating direction, and first and second end surfaces which are opposed to each other in a length direction of the laminated body, with one of the first and second principal surfaces defining a mounting surface;
a first internal electrode disposed on a surface of one of the plurality of ceramic layers in the laminated body, and partially exposed at one of the first and second principal surfaces;
a second internal electrode disposed on the surface of one of the plurality of ceramic layers on which the first internal electrode is disposed, arranged spaced away from the first internal electrode, and partially exposed at one of the first and second principal surfaces;
a first auxiliary conductor disposed in the laminated body, disposed on a surface of a different one of the plurality of ceramic layers from the one of the plurality of ceramic layers on which the first and second internal electrodes are disposed, and unexposed at any of the surfaces of the laminated body;
a second auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first auxiliary conductor is disposed, arranged spaced away from the first auxiliary conductor, and exposed at one of the first and second principal surfaces;
a third auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first and second auxiliary conductors are disposed, arranged spaced away from the first and second auxiliary conductors, and exposed at one of the first and second principal surfaces;
a first external electrode connected to the first internal electrode and the second auxiliary conductor, and disposed on the first or second principal surface; and
a second external electrode connected to the second internal electrode and the third auxiliary conductor, and disposed on the first or second principal surface; wherein the second and third auxiliary conductors overlap the first auxiliary conductor in a thickness direction, and the thickness direction in perpendicular or substantially perpendicular to the laminating direction and the length direction.

2. The multilayer ceramic capacitor according to claim 1 , wherein
the first internal electrode is further exposed partially at the first end surface;
the second internal electrode is further exposed partially at the second end surface;
the second auxiliary conductor is further exposed partially at the first end surface;
the third auxiliary conductor is further exposed partially at the second end surface;
the first external electrode is connected to the first internal electrode and the second auxiliary conductor, and disposed partially on the first or second principal surface to the first end surface; and
the second external electrode is connected to the second internal electrode and the third auxiliary conductor, and disposed partially on the first or second principal surface to the second end surface.

3. The multilayer ceramic capacitor according to claim 1 , wherein
the first and second internal electrodes have an L or substantially L shape; and
the first auxiliary conductor, the second auxiliary conductor, and the third auxiliary conductor have a rectangular or substantially rectangular shape.

4. The multilayer ceramic capacitor according to claim 2 , wherein
the first and second internal electrodes have an L or substantially L shape; and
the first auxiliary conductor, the second auxiliary conductor, and the third auxiliary conductor have a rectangular or substantially rectangular shape.

5. The multilayer ceramic capacitor according to claim 1 , wherein the first internal electrode is not connected to the second internal electrode.

6. The multilayer ceramic capacitor according to claim 1 , wherein
the first internal electrode includes a first opposed electrode portion that opposes the first auxiliary conductor;
the first internal electrode includes a first extended electrode portion that opposes the second auxiliary conductor;
the second internal electrode includes a second opposed electrode portion that opposes the first auxiliary conductor; and
the second internal electrode includes a second extended electrode portion that opposes the third auxiliary conductor.

7. The multilayer ceramic capacitor according to claim 1 , wherein the each of the first and second external electrodes includes a base electrode layer and a plated layer in order from a side closer to the laminated body.

8. The multilayer ceramic capacitor according to claim 7 , wherein the base electrode layer includes at least one layer selected from a baked layer, a resin layer, or a thin film layer.

9. The multilayer ceramic capacitor according to claim 7 , wherein the base electrode layer is a baked layer including glass and a metal.

10. The multilayer ceramic capacitor according to claim 7 , wherein the plated layer includes multiple plated layers.

11. A multilayer ceramic capacitor comprising:
a laminated body that includes a plurality of ceramic layers laminated, first and second principal surfaces which are opposed to each other, first and second side surfaces which are opposed to each other in a laminating direction, and first and second end surfaces which are opposed to each other, with one of the first or second principal surfaces defining a mounting surface;
a first internal electrode disposed on a surface of one of the plurality of ceramic layers in the laminated body, and partially exposed at the first and second principal surfaces;
a second internal electrode disposed on the surface of the one of the plurality of ceramic layers on which the first internal electrode is disposed, arranged spaced away from the first internal electrode, and partially extended at the first and second principal surfaces;
a first auxiliary conductor disposed in the laminated body, disposed on a surface of a different one of the plurality of ceramic layers from the one of the plurality of ceramic layers on which the first and second internal electrodes are disposed, and unexposed at any of the surfaces of the laminated body;
a second auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first auxiliary conductor is disposed, arranged spaced away from the first auxiliary conductor, and exposed at any one of the first and second principal surfaces;
a third auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first and second auxiliary conductors are disposed, arranged spaced away from the first and second auxiliary conductors, and exposed at any one of the first and second principal surfaces;
a fourth auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first, second, and third auxiliary conductors are disposed, arranged spaced away from the first, second, and third auxiliary conductors, and exposed at the principal surface opposed to the surface with the second auxiliary conductor disposed;
a fifth auxiliary conductor disposed on the surface of the different one of the plurality of ceramic layers on which the first, second, third, and fourth auxiliary conductors are disposed, arranged spaced away from the first, second, third, and fourth auxiliary conductors, and exposed at the principal surface opposed to the surface with the third auxiliary conductor disposed;
a first

Assignees

• Murata Manufacturing Co

Inventors

• Ota Yutaka
• Kodama Satoshi

Classifications

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

• H01G4/33 Primary

  Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

• H01G4/012 Primary

  Form of non-self-supporting electrodes · CPC title

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title