Method of controlling temperature of non-volatile storage device

Patent metadata

Field	Value
Publication number	US-10120593-B2
Application number	US-201615160212-A
Country	US
Kind code	B2
Filing date	May 20, 2016
Priority date	May 22, 2015
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

A method of controlling a temperature of a non-volatile storage device includes determining whether the temperature of the non-volatile storage device is greater than a control engagement temperature, and adjusting a data I/O performance level P when the temperature of the non-volatile storage device is greater than the control engagement temperature. The non-volatile storage device may operate at the maximum performance level in a range in which the non-volatile storage device is protected from heat.

First claim

What is claimed is:

1. A method of controlling a temperature of a non-volatile storage device, the method comprising:
detecting the temperature of the non-volatile storage device which is represented by a value measured by a temperature measuring sensor;
determining whether the temperature of the non-volatile storage device is higher than a control engagement temperature; and
adjusting a data I/O performance level P according to Formula 1 below if the temperature of the non-volatile storage device is higher than the control engagement temperature,

P
=

P
max

×
β
×

(

1
-

α
⁢

Δ
⁢

⁢
T

Δ
⁢

⁢

T
b

)

(
1
)

wherein, P max denotes a maximum data I/O performance level of the non-volatile storage device,
ΔT denotes a difference between the temperature of the non-volatile storage device and a reference temperature,
ΔT b denotes a difference between a maximum threshold temperature of the non-volatile storage device and the reference temperature, wherein ΔT b is greater than zero, and
α and β are control parameters of the non-volatile storage device,
the non-volatile storage device comprises:
a substrate; and
a memory controller, a volatile memory, and a non-volatile memory that are mounted on the substrate, and

wherein the temperature measuring sensor is disposed on a surface of or adjacent to at least one of the memory controller, the volatile memory, the non-volatile memory, and the substrate,
the memory controller is configured to receive a temperature value from the temperature measuring sensor, and
based on the received temperature value, the memory controller is configured to control the data I/O performance level according to Formula 1.

2. The method of claim 1 , wherein the data I/O performance level is a data I/O speed.

3. The method of claim 2 , wherein the adjusting of the data I/O performance level P comprises controlling at least one of a number of data I/O channels and a number of ways, in order to control the data I/O speed.

4. The method of claim 2 , wherein the adjusting of the data I/O performance level P comprises controlling a speed of a write/read operation with respect to the non-volatile storage device, in order to control the data I/O speed.

5. The method of claim 4 , wherein the controlling of speed of the write/read operation with respect to the non-volatile storage device is performed according to a Tprog function.

6. The method of claim 1 , wherein the reference temperature is lower than the control engagement temperature.

7. The method of claim 1 , wherein the memory controller comprises a firmware capable of performing the determining of whether the temperature of the non-volatile storage device is higher than the control engagement temperature and the adjusting of the data I/O performance level P.

8. The method of claim 1 , further comprising, after the adjusting of the data I/O performance level P:
determining whether the temperature of the non-volatile storage device is lower than the control engagement temperature; and
setting the data I/O performance level P to a maximum data I/O performance level P max if the temperature of the non-volatile storage device is lower than the control engagement temperature.

9. The method of claim 1 , wherein the determining of whether the temperature of the non-volatile storage device is higher than the control engagement temperature is repeated at intervals.

10. The method of claim 9 , wherein a period for the determining of whether the temperature of the non-volatile storage device is higher than the control engagement temperature is in a range of about one second to about one hour.

11. The method of claim 9 , further comprising adjusting the data I/O performance level P according to Formula 1 if the temperature of the non-volatile storage device is higher than the control engagement temperature.

12. A method of controlling a temperature of a non-volatile storage device, the non-volatile storage device comprising a substrate and a memory controller, a volatile memory, and a non-volatile memory that are mounted on the substrate, the method comprising:
detecting a temperature at predetermined time intervals by using a temperature measuring sensor and sending a temperature value to the memory controller; and
controlling, by using the memory controller, a speed of a write/read operation with respect to the non-volatile memory based on the temperature value,
wherein the controlling of the speed of the write/read operation with respect to the non-volatile memory comprises:
setting the write/read speed to a maximum value if the temperature is less than or equal to a control engagement temperature, and
applying at least one of (a), (b), and (c) according to Formula 2 below if the temperature is higher than the control engagement temperature,

P
=

P
max

×

f
⁡

(

Δ
⁢

⁢
T

Δ
⁢

⁢

T
b

Assignees

• Samsung Electronics Co Ltd

Inventors

• Byun Jae-Beom
• Zhao Hu
• Park Jong-Gyu
• Kong Do-Il
• Ryu Chung-Hyun
• Shim Eok-Soo

Classifications

• G06F3/0685

  Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays · CPC title

• G06F3/0613

  in relation to throughput · CPC title

• G06F3/0616 Primary

  in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title

• G11C5/04 Primary

  Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

• G06F3/0634

  by changing the state or mode of one or more devices · CPC title