Thermal management apparatus and method using dynamic thermal margin, and semiconductor processor device, non-volatile data storage device and access control method using the same

Patent metadata

Field	Value
Publication number	US-10120426-B2
Application number	US-201615221909-A
Country	US
Kind code	B2
Filing date	Jul 28, 2016
Priority date	Dec 9, 2015
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

Disclosed herein are a thermal management apparatus and method using a dynamic thermal margin, and a semiconductor processor device, a non-volatile data storage device and an access control method using the same. The thermal management apparatus and method using a dynamic thermal margin, and the semiconductor processor device, non-volatile data storage device and access control method using the same can guarantee required performance based on importance and priority by scaling a thermal margin based on the importance of a task or the priority of threads, can control the generation of heat in a software manner while being compatible with non-volatile memory interface standards, and can also provide performance varying depending on the importance of a request that is being processed.

First claim

What is claimed is:

1. A semiconductor processor device, comprising:
a thermal margin determination unit configured to determine a thermal margin of the semiconductor processor device based on any one of a priority of threads being executed on one or more processor cores of the semiconductor processor device and a load of the one or more processor cores;
a thermal margin state determination unit configured to determine a thermal margin state of the semiconductor processor device based on a current temperature of the semiconductor processor device and the thermal margin;
a policy determination unit configured to determine a thermal management policy regarding the processor cores based on the thermal margin state; and
a processor core setting unit configured to set activation, voltage, and frequency of the processor cores in compliance with the thermal management policy,
wherein the thermal margin defines a difference between a critical temperature of the semiconductor processor device, which is a temperature adapted to protect the semiconductor processor device, and a restrictive temperature of the semiconductor processor device, which is a temperature adapted to cause a change in the thermal management policy, and
wherein the thermal margin state is determined to be a state in which the current temperature is lower than the restrictive temperature or a state in which the current temperature is not lower than the restrictive temperature.

2. The semiconductor processor device of claim 1 , wherein the thermal margin determination unit is further configured to reduce the thermal margin, in response to the priority of the threads becoming higher or the load of the processor cores becoming higher.

3. The semiconductor processor device of claim 1 , wherein
the thermal margin state determination unit is further configured to determine the thermal margin state to be a first state, in response to the current temperature being lower than the restrictive temperature, and to determine the thermal margin state to be a second state, in response to the current temperature being higher than the restrictive temperature, and
the policy determination unit is further configured to maintain a current thermal management policy while the thermal margin state is the first state, and to repeatedly watch a change in the thermal management policy and a change in current temperature based on a changed thermal management policy until the current temperature becomes lower than the restrictive temperature while the thermal margin state is in the second state.

4. The semiconductor processor device of claim 1 , wherein
the thermal margin state determination unit is further configured to
maintain a current thermal margin state in a first state when the current temperature is lower than the restrictive temperature, and switch the current thermal margin state from the first state to a second state, in response to the current temperature being higher than the restrictive temperature
switch the current thermal margin state to a third state, in response to the thermal management policy being changed while the current thermal margin state is in the second state, and
switch the current thermal margin state to the second state, in response to the current temperature being higher than a secondary restrictive temperature while the current thermal margin state is in the third state, maintain the current thermal margin state in the third state when the current temperature is lower than the secondary restrictive temperature and is higher than a return temperature, and switch the current thermal margin state to the first state, in response to the current temperature being lower than the return temperature, and

the policy determination unit is further configured to maintain the current thermal management policy while the thermal margin state is in the first state, and to determine the thermal management policy so that the current temperature is lower than the secondary restrictive temperature or the return temperature while the thermal margin state is in the second state.

5. A thermal management apparatus, comprising:
a thermal margin determination unit configured to determine a thermal margin of a semiconductor processor device based on any one of a priority of threads being executed on one or more processor cores of the semiconductor processor device and a load of the one or more processor cores;
a thermal margin state determination unit configured to determine a thermal margin state of the semiconductor processor device based on a current temperature of the semiconductor processor device and the thermal margin; and
a policy determination unit configured to determine a thermal management policy regarding the one or more processor cores based on the thermal margin state,
wherein the thermal margin defines a difference between a critical temperature of the semiconductor processor device, which is a temperature adapted to protect the semiconductor processor device, and a restrictive temperature of the semiconductor processor device, which is a temperature adapted to cause a change in the thermal management policy, and
wherein the thermal margin state is determined to be a state in which the current temperature of the semiconductor processor device is lower than the restrictive temperature or a state in which the current temperature is not lower than the restrictive temperature.

6. The thermal management apparatus of claim 5 , wherein the thermal margin determination unit is further configured to reduce the thermal margin, in response to the priority of the threads becoming higher or the load of the one or more processor cores becoming higher.

7. The thermal management apparatus of claim 5 , wherein
the thermal margin state determination unit is further configured to determine the thermal margin state to be a first state, in response to the current temperature being lower than the restrictive temperature, and to determine the thermal margin state to be a second state, in response the current temperature being higher than the restrictive temperature; and
the policy determination unit is further configured to maintain a current thermal management policy while the thermal margin state is in the first state, and to repeatedly watch a change in the thermal management policy and a change in current temperature based on a changed thermal management policy until the current temperature is lower than the restrictive temperature while the thermal margin state is in the second state.

8. The thermal management apparatus of claim 5 , wherein
the thermal margin state determination unit is further configured to
maintain a current thermal margin state in a first state when the current temperature is lower than the restrictive temperature while a current thermal margin state is in the first state, and switch the current thermal margin state from the first state to a second state, in response to the current temperature being higher than the restrictive temperature,
switch the current thermal margin state to a third state, in response to the thermal management policy being changed while the current thermal margin state is in the second state, and
switch the current thermal margin state to the second state, in response to the current temperature being higher than a secondary restrictive temperature while the current thermal margin state is in the third state, maintain the current thermal margin state in the third state when the current temperature is lower than the secondary restrictive temperature and is higher than a return temperature, and switch the current thermal margin state to the first state, in response to the current temperature being lower than the return temperature, and

the policy determinatio

Assignees

• Research & Business Found Sungkyunkwan Univ

Inventors

• Seo Eui Seong
• Badano Nicolas
• Woo Young Joo
• Seo Bon Keun

Classifications

• G06F1/206 Primary

  comprising thermal management · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0611

  in relation to response time · CPC title