Enabling testing of an integrated circuit at a single temperature

US10120017B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10120017-B2
Application numberUS-201615211022-A
CountryUS
Kind codeB2
Filing dateJul 15, 2016
Priority dateJul 15, 2016
Publication dateNov 6, 2018
Grant dateNov 6, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one aspect, an integrated circuit (IC) includes an output port enabling measurement of a performance characteristic of the IC at a first temperature. The performance characteristic of the IC is a minimum value at the first temperature with respect to any other temperature. The first temperature may be room temperature.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit (IC), comprising: an output port enabling measurement of a performance characteristic of the IC at a first temperature; a first digital-to-analog converter (DAC) configured to receive a first current that is independent of temperature; a second DAC configured to receive a second current proportional to temperature; a third DAC configured to receive a third current that increases in magnitude above the first temperature and is zero below the first temperature; a fourth DAC to receive the output of the first, second and third DACs to produce an output current, wherein the output current is weighted to enable the output current to have the minimum value at the first temperature, wherein the performance characteristic of the IC is a minimum value at the first temperature with respect to any other temperature. 2. The IC of claim 1 , wherein the first temperature is room temperature. 3. The IC of claim 1 , wherein the performance characteristic is controlled by current. 4. The IC of claim 1 , wherein the first current equals the second current at the first temperature. 5. The IC of claim 1 , wherein the first current is trimmed based on performance of the IC at the first temperature to enable the output current to have a minimum at the first temperature. 6. The IC of claim 5 , wherein a signal is received to trim the first current in response to the first current and the second current at the first temperature. 7. The IC of claim 6 , wherein the signal is received from a comparator system configured to measure the difference between the first and second currents. 8. The IC of claim 7 , wherein the signal indicates the first and second currents are equal at the first temperature. 9. The IC of claim 1 , where the second current is trimmed based on performance of the IC at the first temperature to enable the output current to have a minimum at the first temperature. 10. The IC of claim 9 , wherein a signal is received to trim the second current in response to the first current and the second current at the first temperature. 11. The IC of claim 1 , wherein the performance characteristic is controlled by voltage. 12. The IC of claim 1 , wherein the performance characteristic is controlled a magnetic field. 13. An integrated circuit (IC), comprising: a first digital-to-analog converter (DAC) configured to receive a first current that is independent of temperature; a second DAC configured to receive a second current proportional to temperature; a third DAC configured to receive a third current that increases in magnitude above room temperature and is zero below the room temperature; a fourth DAC to receive the output of the first, second and third DACs to produce an output current, an output port enabling measurement of a performance characteristic of the IC at the room temperature, wherein the performance characteristic of the IC is a minimum value at the room temperature with respect to any other temperature, wherein the performance characteristic is controlled by at least one of current, voltage or a magnetic field, wherein the output current is weighted to enable the output current to have the minimum value at the first temperature. 14. The IC of claim 13 , wherein the signal indicates the first and second currents are equal at the room temperature. 15. The IC of claim 13 , wherein a signal is received to trim the first current in response to the first current and the second current at the room temperature. 16. The IC of claim 13 , wherein the first current is trimmed based on performance of the IC at the first temperature to enable the output current to have a minimum at the first temperature, wherein a signal is received to trim the first current in response to the first current and the second current at the first temperature, wherein the signal is received from a comparator system configured to measure the difference between the first and second currents, wherein the signal indicates the first and second currents are equal at the first temperature. 17. The IC of claim 13 , where the second current is trimmed based on performance of the IC at the first temperature to enable the output current to have a minimum at the first temperature, wherein a signal is received to trim the second current in response to the first current and the second current at the first temperature, wherein the signal is received from a comparator system configured to measure the difference between the first and second currents.

Assignees

Inventors

Classifications

  • related to temperature · CPC title

  • Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM] · CPC title

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Frequently asked questions

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What does patent US10120017B2 cover?
In one aspect, an integrated circuit (IC) includes an output port enabling measurement of a performance characteristic of the IC at a first temperature. The performance characteristic of the IC is a minimum value at the first temperature with respect to any other temperature. The first temperature may be room temperature.
Who is the assignee on this patent?
Allegro Microsystems Llc
What technology area does this patent fall under?
Primary CPC classification G01R31/2874. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).