Low power capacitive sensor button

US10116307B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10116307-B2
Application numberUS-201514865288-A
CountryUS
Kind codeB2
Filing dateSep 25, 2015
Priority dateOct 22, 2014
Publication dateOct 30, 2018
Grant dateOct 30, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed herein are system, methods, and apparatus for low power capacitive sensors. Apparatus may include a timing block configured to generate a repetitive trigger signal having a first frequency, and further configured to generate a clock signal having a second frequency. Apparatus may also include a sensing block coupled with the timing block and configured to, in response to the repetitive trigger signal, detect a change in capacitance associated with an object proximate to a capacitive sensor button by applying an excitation signal to the capacitive sensor button during a measurement period. Apparatus further include a wake logic block coupled with the sensing block and configured to transition a processing unit from a first power consumption state to a second power consumption state in response to the sensing block detecting the change in capacitance associated with the object proximate to the capacitive sensor button.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a timer circuit configured to generate a repetitive trigger signal having a first frequency; an oscillator configured to generate a clock signal having a second frequency; a sensing circuitry block coupled with the timer circuit and the oscillator and configured to, in response to the repetitive trigger signal, detect a change in capacitance associated with an object proximate to a capacitive sensor button by applying an excitation signal to the capacitive sensor button during a measurement period; and a wake logic coupled with the sensing circuitry block, the wake logic configured to transition a processing unit from a first power consumption state to a second power consumption state in response to the sensing circuitry block detecting the change in capacitance associated with the object proximate to the capacitive sensor button. 2. The apparatus of claim 1 , wherein an average current drawn by the sensing circuitry block during the measurement period no more than 1 uA. 3. The apparatus of claim 1 , wherein the oscillator comprises a low power oscillator block configured to generate the clock signal. 4. The apparatus of claim 3 , wherein an average current drawn by the low power oscillator block is no more than 10 nA, wherein a combined current drawn by the timer circuit, the low power oscillator block, and the sensing circuitry block is less than 200 nA. 5. The apparatus of claim 3 , wherein the low power oscillator block is further configured to provide the clock signal to the timer circuit, and wherein the timer circuit is further configured to generate the repetitive trigger signal based on the clock signal. 6. The apparatus of claim 1 , wherein the first power consumption state is a first Advanced Configuration and Power Interface (ACPI) power state, and wherein the second power consumption state is a second ACPI power state. 7. The apparatus of claim 1 , wherein the second power consumption state is configured to consume less power during a period of time than the first power consumption state. 8. The apparatus of claim 1 , wherein the sensing circuitry block further comprises: a state machine configured to transition the sensing circuitry block from the first power consumption state to the second power consumption state in response to a pulse of the repetitive trigger signal; and a sensing circuit coupled with the state machine, wherein, during operation of the sensing circuitry block in the second power consumption state, the sensing circuit is configured to apply the excitation signal to the capacitive sensor button during the measurement period. 9. The apparatus of claim 8 , wherein the state machine is configured to transition the sensing circuitry block to the first power consumption state after the measurement period and before a next subsequent pulse of the repetitive trigger signal. 10. The apparatus of claim 1 , wherein a sensing circuit of the sensing circuitry block comprises: a reference branch; a sensor branch; and a comparator coupled with the reference branch and the sensor branch, wherein the sensing circuit is configured to: apply the excitation signal to the reference branch, apply the excitation signal to the capacitive sensor button via the sensor branch, and compare a voltage at a first node in the reference branch with a voltage at a second node in the sensor branch. 11. The apparatus of claim 1 , wherein the sensing circuitry block is configured to cause a processing unit to transition from the first power consumption state to the second power consumption state in response to detecting a change in capacitance associated with an object proximate to the capacitive sensor button. 12. A method comprising: generating a repetitive trigger signal; generating an excitation signal having a higher frequency than the repetitive trigger signal; detecting a change in capacitance associated with an object proximate to a capacitive sensor by applying the excitation signal to the capacitive sensor during a measurement period, the measurement period being triggered by a pulse of the repetitive trigger signal; and in response to detecting the change in capacitance associated with the object proximate to the capacitive sensor, transitioning a processing unit from a first power consumption state to a second power consumption state, the second power consumption state being a higher power consumption state than the first power consumptions state. 13. The method of claim 12 , further comprising: applying the excitation signal to a reference branch; applying the excitation signal to the capacitive sensor via a sensor branch; and comparing a voltage at a first node in the reference branch with a voltage at a second node in the sensor branch. 14. The method of claim 12 , wherein the first power consumption state is a first Advanced Configuration and Power Interface (ACPI) power state, and wherein the second power consumption state is a second ACPI power state. 15. The method of claim 12 , further comprising: transitioning from the first power consumption state to the second power consumption state in response to a start of a first pulse of the repetitive trigger signal; and transitioning from the second power consumption state to the first power consumption state after the measurement period and before a subsequent pulse of the repetitive trigger signal after the first pulse of the repetitive trigger signal. 16. A system comprising: a processing unit; a capacitive sensor; a timer circuit configured to generate a repetitive trigger signal having a first frequency; a low power oscillator block configured to generate a clock signal having a second frequency; a sensing circuitry block coupled with the timer circuit and the oscillator block and configured to initiate a measurement period in response to the repetitive trigger signal, and further configured to detect a presence of an object at the capacitive sensor by applying an excitation signal, based on the clock signal to the capacitive sensor, during the measurement period; and a wake logic coupled with the sensing circuitry block, the wake logic configured to transition the processing unit from a first power consumption state to a second power consumption state in response to the sensing circuitry block detecting the presence of the object at the capacitive sensor. 17. The system of claim 16 , wherein the timer circuit is configured to generate the repetitive trigger signal based on the clock signal, and wherein the repetitive trigger signal has a frequency not greater than 1 Hz, and wherein the clock signal has a frequency not greater than 1 kHz. 18. The system of claim 16 , further comprising a memory coupled with the processing unit, wherein the memory is configured to store instructions executable by the processing unit, and wherein the processing unit is configured to automatically execute the instructions after transitioning from the first power consumption state to the second power consumption state in response to the sensing circuitry block detecting the presence of the object at the capacitive sensor. 19. The system of claim 16 , wherein the timer circuit, the low power oscillator block, the sensing circuitry block, and the wake logic operate on a first power domain, and wherein the processing unit operates on a second power domain independent from the first power domain. 20. The system of claim 16 , wherein the capacitive sensor further comprises: a transmit (TX) electr

Assignees

Inventors

Classifications

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  • H03K17/962Primary

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What does patent US10116307B2 cover?
Disclosed herein are system, methods, and apparatus for low power capacitive sensors. Apparatus may include a timing block configured to generate a repetitive trigger signal having a first frequency, and further configured to generate a clock signal having a second frequency. Apparatus may also include a sensing block coupled with the timing block and configured to, in response to the repetitiv…
Who is the assignee on this patent?
Cypress Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H03K17/962. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).