IGBT gate driving circuit

Patent metadata

Field	Value
Publication number	US-10116292-B2
Application number	US-201715468326-A
Country	US
Kind code	B2
Filing date	Mar 24, 2017
Priority date	Apr 1, 2016
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

There is a problem in related-art semiconductor devices that the chip size of a semiconductor device having an active Miller clamp function cannot be reduced. According to one embodiment, a semiconductor device is configured to, when a power device is turned on or off, monitor a gate voltage Vg of the power device, set a predetermined range within a transition range, the transition range being a range within which the gate voltage Vg changes, change, when the gate voltage Vg is within the predetermined range, the gate voltage Vg of the power device by using a predetermined number of constant-current circuits, and change, when the gate voltage Vg is outside the predetermined range, the gate voltage Vg by using a larger number of constant-current circuits than the number of constant-current circuits that are used when the gate voltage Vg is within the predetermined range.

First claim

What is claimed is:

1. A semiconductor device comprising:
a gate line connected to a gate terminal of a power device including a first terminal, a second terminal, and the gate terminal;
a plurality of first constant-current circuits connected between the gate line and a power supply line;
a plurality of second constant-current circuits connected between the gate line and a ground line;
a constant-current circuit selecting circuit configured to select a constant-current circuit to be activated from among the plurality of first constant-current circuits and the plurality of second constant-current circuits and output an activation instruction signal to the selected constant-current circuit;
a first comparator configured to change a level of a first voltage detection signal from a first logical level to a second logical level when a voltage at the gate terminal becomes higher than a first threshold voltage;
a second comparator configured to change a level of a second voltage detection signal from the first logical level to the second logical level when the voltage at the gate terminal becomes higher than a second threshold voltage; and
a gate mode setting circuit configured to control an on/off-state of the constant-current circuit selected by the constant-current circuit selecting circuit based on a gate control signal for controlling an on/off-state of the power device, the activation instruction signal, the first voltage detection signal, and the second voltage detection signal,
wherein the gate mode setting circuit controls the on/off-state of the constant-current circuit selected by the constant-current circuit selecting circuit in a first period in which the first and second voltage detection signals have different logical levels,
the gate mode setting circuit controls the on/off-state of the constant-current circuit selected by the constant-current circuit selecting circuit in a second period in which the first and second voltage detection signals have the same logical level and
the gate mode setting circuit increases a number of constant-current circuits controlled in an on-state in the second period compared to a number of constant-current circuits controlled in an on-state in the first period.

2. The semiconductor device according to claim 1 , wherein
the first threshold voltage includes a first pre-boost threshold voltage and a first clamp threshold voltage lower than the first pre-boost threshold voltage,
the second threshold voltage includes a second clamp threshold voltage and a second pre-boost threshold voltage lower than the second clamp threshold voltage,
the first pre-boost threshold voltage is lower than the second clamp threshold voltage,
the first clamp threshold voltage is lower than the second pre-boost threshold voltage, and
the semiconductor device further comprises:
a first threshold voltage switching part configured to select the first pre-boost threshold voltage in a period in which the gate control signal has a high level, select the first clamp threshold voltage in a period in which the gate control signal has a low level, and supply the selected threshold voltage to the first comparator; and
a second threshold voltage switching part configured to select the second clamp threshold voltage in the period in which the gate control signal has the high level, select the second pre-boost threshold voltage in the period in which the gate control signal has the low level, and supply the selected threshold voltage to the second comparator.

3. The semiconductor device according to claim 1 , wherein
each of the plurality of first constant-current circuits comprises:
a first constant-current source, one end of the first constant-current source being connected to the power supply line; and
a first switch connected between another end of the first constant-current source and the gate line, the first switch being configured so that its open/close state is switched by the gate mode setting circuit, and
each of the plurality of second constant-current circuits comprises:
a second constant-current source, one end of the second constant-current source being connected to the ground line; and
a second switch connected between another end of the second constant-current source and the gate line, the second switch being configured so that its open/close state is switched by the gate mode setting circuit.

4. The semiconductor device according to claim 1 , wherein
each of the plurality of first constant-current circuits comprises a PMOS transistor configured so that its on/off-state is switched by the gate mode setting circuit, and
each of the plurality of second constant-current circuits comprises an NMOS transistor configured so that its on/off-state is switched by the gate mode setting circuit.

5. The semiconductor device according to claim 1 , wherein
the gate mode setting circuit comprises a plurality of logical circuit groups provided so as to correspond to the plurality of first constant-current circuits, respectively, and to the plurality of second constant-current circuits, respectively,
each of the plurality of logical circuit groups comprises:
a first logical multiplication circuit configured to calculate a logical multiplication of a corresponding activation signal and the first voltage detection signal;
a second logical multiplication circuit configured to calculate a logical multiplication of an output value of the first logical multiplication circuit and an inverted signal of the second voltage detection signal;
a first logical sum circuit configured to calculate a logical sum of an output value of the second logical multiplication circuit and an inverted signal of the gate control signal and output the calculated value to a corresponding first constant-current circuit;
a second logical sum circuit configured to calculate a logical sum of the corresponding activation signal and an inverted signal of the first voltage detection signal;
a third logical sum circuit configured to calculate a logical sum of an output value of the second logical sum circuit and the second voltage detection signal; and
a third logical multiplication circuit configured to calculate a logical multiplication of an output value of the third logical sum circuit and the inverted signal of the gate control signal and output the calculated value to a corresponding second constant-current circuit.

6. The semiconductor device according to claim 1 , wherein
the power device is an IGBT component, and

a first, and second terminals are an emitter terminal, and a collector terminal, respectively.

Assignees

• Renesas Electronics Corp

Inventors

• Yokoi Yoshihiko
• Ojima Yusuke

Classifications

• H03K17/163

  Soft switching · CPC title

• H03K5/24

  the characteristic being amplitude · CPC title

• H03K17/08128

  in composite switches · CPC title

• H03K5/08 Primary

  by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding (H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30) · CPC title

• H03K17/168

  in composite switches · CPC title