Front-end amplifier circuits for biomedical electronics

Patent metadata

Field	Value
Publication number	US-10116262-B2
Application number	US-201615383261-A
Country	US
Kind code	B2
Filing date	Dec 19, 2016
Priority date	Mar 16, 2016
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A front-end amplifier circuit for receiving a biological signal includes a signal channel. The signal channel amplifies the biological signal to generate a detection current and includes a capacitive-coupled transconductance amplifier. The capacitive-coupled transconductance amplifier amplifies the biological signal with a transconductance gain to generate a first current.

First claim

What is claimed is:

1. A front-end amplifier circuit for receiving a biological signal, comprising:
a signal channel, amplifying the biological signal to generate a detection current, wherein the signal channel comprises:
a capacitive-coupled transconductance amplifier, amplifying the biological signal with a transconductance gain to generate a first current; and
a band-pass filtering amplifier, filtering noise in the first current outside a bandwidth and amplifying the first current with a first current gain to generate a second current;
a programmable-gain amplifier, amplifying the second current with a second current gain to generate the detection current on a programmable-gain output node, wherein the second current gain is programmable; and
an offset cancellation circuit, configured to cancel output offset currents of the capacitive-coupled transconductance amplifier, the band-pass filtering amplifier, and the programmable-gain amplifier.

2. The front-end amplifier circuit of claim 1 , wherein the capacitive-coupled transconductance amplifier comprises:
a first input capacitor, coupled between a negative input node and a first node;
a second input capacitor, coupled between a positive input node and a second node, wherein the first input capacitor and the second input capacitor receive the biological signal by a way of AC-couple in a differential mode;
a first common-mode P-type transistor, configured to provide a common-mode voltage for the first node;
a second common-mode P-type transistor, configured to provide the common-mode voltage for the second node;
a first current source, configured to provide a first transconductance bias current;
a second current source, configured to provide a second transconductance bias current;
a first transconductance P-type transistor, wherein a source terminal receives the first transconductance bias current, and a gate terminal is coupled to the second node;
a second transconductance P-type transistor, wherein a source terminal receives the second transconductance bias current, and a gate terminal is coupled to the first node, wherein the first transconductance P-type transistor and the second transconductance P-type transistor are configured to the transconductance gain;
a linear resistor, coupled between the source terminal of the first transconductance P-type transistor and the source terminal of the second transconductance P-type transistor, wherein the linear resistor is configured to improve linearity of the transconductance gain;
a third transconductance P-type transistor, wherein a source terminal is coupled to a drain terminal of the first transconductance P-type transistor, and a gate terminal receives a transconductance bias voltage;
a fourth transconductance P-type transistor, wherein a source terminal is coupled to a drain terminal of the second transconductance P-type transistor, a gate terminal receives the transconductance bias voltage, and a drain terminal is coupled to a transconductance output node, wherein the transconductance output node outputs the first current;
a first transconductance N-type transistor, wherein a drain terminal and a gate terminal are both coupled to a drain terminal of the third transconductance P-type transistor;
a second transconductance N-type transistor, wherein a drain terminal is coupled to the transconductance output node, and a gate terminal is coupled to the gate terminal of the first transconductance N-type transistor;
a third transconductance N-type transistor, wherein a drain terminal and a gate terminal are both coupled to a source terminal of the first transconductance N-type transistor, and a source terminal is coupled to a ground; and
a fourth transconductance N-type transistor, wherein a drain terminal is coupled to a source terminal of the second transconductance N-type transistor, a gate terminal is coupled to the gate terminal of the third transconductance N-type transistor, and a source terminal is coupled to the ground.

3. The front-end amplifier circuit of claim 1 , further comprising:
a transimpedance amplifier, configured to amplify the detection current with a transimpedance gain to generate a voltage signal and to provide a driving capability for a coupled measurement system, wherein an amplified ratio of the biological signal converted into the voltage signal is a product of the transconductance gain, the first current gain, and the second current gain.

4. The front-end amplifier circuit of claim 1 , wherein the band-pass filtering amplifier comprises:
a master band-pass current path, comprising a master band-pass bias current and configured to receive the first current;
a band-pass filter, AC-coupled to the master band-pass current path and filtering the noise of the first current outside the bandwidth to generate a filter signal; and
a slave band-pass current path, comprising a slave band-pass bias current and generating the second current according to the filter signal, wherein the first current gain is a ratio of the slave band-pass bias current to the master band-pass bias current.

5. The front-end amplifier circuit of claim 4 , wherein the master band-pass current path comprises:
a first master P-type transistor, wherein a source terminal receives a supply voltage, and a gate terminal is coupled to a drain terminal;
a second master P-type transistor, wherein a source terminal is coupled to the drain terminal of the first master P-type transistor, and a gate terminal and a drain terminal receive the first current;
a first master N-type transistor, wherein a gate terminal and a drain terminal are coupled to the drain terminal of the first master P-type transistor; and
a second master N-type transistor, wherein a gate terminal and a drain terminal are coupled to a source terminal of the first master N-type transistor, and a source terminal is coupled to the ground.

6. The front-end amplifier circuit of claim 5 , wherein the first master P-type transistor, the second master P-type transistor, the first master N-type transistor, and the second master N-type transistor are all operated in a sub-threshold region to reduce power consumption.

7. The front-end amplifier circuit of claim 5 , wherein the slave band-pass current path comprises:
a first slave P-type transistor, wherein a source terminal is coupled to the supply voltage, and a gate terminal is coupled to a drain terminal;
a second slave P-type transistor, wherein a source terminal is coupled to a drain terminal of the first P-type transistor, and a drain terminal is coupled to a band-pass output node;
a first slave N-type transistor, wherein a gate terminal is coupled to a gate terminal of the second slave P-type transistor, and a drain terminal is coupled to the band-pass output node, wherein the gate terminal of the first slave N-type transistor receives the filter signal, and the band-pass output node outputs the second current; and
a second slave N-type transistor, wherein a gate terminal and a drain terminal are coupled to a source terminal of the first slave N-type transistor, and a source terminal is coupled to the ground, wherein a ratio of transistor sizes of the slave band-pass current path to transistor sizes of the master band-pass current path is the first current gain.

8. The front-end amplifier circuit of claim 7 , wherein the first slave P-type transistor, the second slave P-type transistor, the first slave N-type transistor, and the second slave N-type transistor are all operated in a sub-threshold region to reduce power consumption.

9. The front-end amplifier circuit of claim 7 , wherein the band-pass filter comprises:
a first differential-input amplifier, configured to generate a transconductance and comprising

Assignees

• Winbond Electronics Corp

Inventors

• Wu Chung-Yu
• Sung Ya-Syuan

Classifications

• H03F2200/462

  the current being sensed · CPC title

• A61B5/04004

  Human Necessities · mapped topic

• A61B5/0428

  Human Necessities · mapped topic

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03G1/0029

  using field-effect transistors [FET] · CPC title