Methods and apparatus for three-dimensional NAND non-volatile memory devices with side source line and mechanical support

Patent metadata

Field	Value
Publication number	US-10115736-B2
Application number	US-201715707842-A
Country	US
Kind code	B2
Filing date	Sep 18, 2017
Priority date	Oct 26, 2015
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric layers above a substrate, forming a source line above the substrate, forming a memory hole extending through the alternating word line and dielectric layers and the source line, and forming a mechanical support element on the substrate adjacent to the memory hole.

First claim

The invention claimed is:

1. A method of fabricating a monolithic three dimensional memory structure, the method comprising:
forming a stack of alternating word line and dielectric layers above a substrate;
forming a source line above the substrate;
forming a memory hole extending through the alternating word line and dielectric layers and the source line; and
forming a mechanical support element on the substrate adjacent to the memory hole, the mechanical support element extending through the source line.

2. The method of claim 1 , further comprising:
forming a vertical channel in the memory hole;
forming an outer layer and a channel in the memory hole;
selectively removing a portion of the outer layer to expose a peripheral exterior of the channel; and
forming the source line in contact with the exposed peripheral exterior of the channel.

3. The method of claim 2 , wherein forming the mechanical support element comprises forming the mechanical support element adjacent the exposed peripheral exterior of the channel.

4. The method of claim 1 , further comprising:
forming a sacrificial material layer on the substrate;
etching a trench in the sacrificial material layer and the substrate; and
forming the mechanical support element in the trench.

5. The method of claim 4 , further comprising:
selectively removing the sacrificial material layer; and
replacing the sacrificial material with the source line.

6. The method of claim 1 , further comprising forming a plurality of mechanical support elements on the substrate adjacent to the memory hole.

7. The method of claim 1 , wherein forming the mechanical support element comprises forming a first plurality of mechanical support elements on a first region of the substrate and a second plurality of mechanical support elements on a second region of the substrate.

8. The method of claim 1 , further comprising forming the stack of alternating word line and dielectric layers above the mechanical support element.

9. A method of forming a three-dimensional stacked non-volatile memory structure, the method comprising:
forming a source line above a substrate;
forming a stack of alternating word line and dielectric layers above the substrate;
forming a plurality of NAND strings of memory cells in memory holes which extend through the source line and the alternating word line and dielectric layers, each memory cell comprising a control gate formed by one of the word line layers; and
forming a mechanical support element on the substrate adjacent the plurality of NAND strings, the mechanical support element extending through the source line.

10. The method of claim 9 , wherein forming the mechanical support element comprises forming a plurality of mechanical support elements.

11. The method of claim 10 , further comprising forming the plurality of mechanical support elements along a peripheral region of the plurality of NAND strings.

12. The method of claim 9 , wherein forming the mechanical support element comprises forming a first set of mechanical support elements at a first region of the memory structure, forming a second set of mechanical support elements at a second region of the memory structure, and forming a third mechanical support element at a third region of the memory structure.

13. The method of claim 12 , wherein the first region comprises a first peripheral region of the memory structure, the second region comprises a second peripheral region of the memory structure, and the third region comprises a central region of the memory structure.

14. The method of claim 9 , wherein forming the mechanical support element comprises forming the mechanical support element to a height substantially equal to a height of a top surface of the source line.

15. The method of claim 9 , wherein forming the mechanical support element comprises forming the mechanical support element to a height between about 500 angstroms and about 3500 angstroms.

16. The method of claim 9 , wherein the mechanical support element comprises polysilicon.

17. The method of claim 9 , wherein forming the NAND strings comprises forming each of the NAND strings with a vertical channel comprising a peripheral exterior in contact with the source line.

18. The method of claim 17 , wherein the vertical channel comprises polysilicon.

Assignees

• Sandisk Technologies Llc

Inventors

• Liu Jin
• Ge Chun
• Alsmeier Johann

Classifications

• H01L27/1157

  Electricity · mapped topic

• H01L27/11573

  Electricity · mapped topic

• H01L27/11529

  Electricity · mapped topic

• H01L27/11556

  Electricity · mapped topic

• H01L27/11582 Primary

  Electricity · mapped topic