Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Method for filling a wafer via with solder
US10115635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10115635-B2 |
| Application number | US-201715423602-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 3, 2017 |
| Priority date | Jul 12, 2011 |
| Publication date | Oct 30, 2018 |
| Grant date | Oct 30, 2018 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A wafer via solder filling device includes a solder bath comprising an accommodation space for accommodating a molten solder, with an open top, and an air outlet for exhausting air from the accommodation space; a fixing unit for fixing the wafer having a via formed in one surface in the accommodation space to seal the accommodation space airtight; and a pressing unit for pressing a bottom of the molten solder arranged in the solder bath and moving the molten solder upward, to fill the molten solder in the via.
First claim
Opening claim text (preview).
What is claimed is: 1. A wafer via solder filling method using a wafer via solder filling device comprising a solder bath comprising an accommodation space for accommodating a molten solder, with an open top, and an air outlet for exhausting air from the accommodation space; a fixing unit for fixing the wafer having a via formed in one surface in the accommodation space to seal the accommodation space airtight; and a pressing unit for pressing a bottom of the molten solder arranged in the solder bath and moving the molten solder upward, to fill the molten solder in the via, the wafer via solder filling method comprising: a fixing step of fixing the wafer in the accommodation space, using the fixing unit, and sealing the accommodation space airtight; an exhausting step of exhausting air inside the sealed accommodation space through the air outlet; and a filling step of filling the molten solder in the via as pressing the bottom of the molten solder and moving the molten solder upward, using the pressing unit. 2. A wafer via solder filling method using a wafer via solder filling device comprising a solder bath comprising an accommodation space for accommodating a molten solder, with an open top; a fixing unit for providing a suction force to a top surface of a wafer having a via vertically there through and fixing the wafer in the accommodation space; and a pressing unit for pressing a bottom of the molten solder arranged in the solder bath and moving the molten solder upward, to fill the molten solder in the via, the wafer via solder filling method comprising: a fixing step of fixing the wafer in the accommodation space, using the fixing unit; and a filling step of filling the molten solder in the via by providing a suction force to a top surface of the wafer as pressing a bottom of the motel solder and moving the molten solder upward simultaneously, using the pressing unit.
Assignees
Inventors
Classifications
characterised by the filling method or the material of the conductive fill · CPC title
comprising use of blind vias during the manufacture · CPC title
Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title
- H10W20/023Primary
the interconnections being through-semiconductor vias · CPC title
Soldering or brazing jigs, fixtures or clamping means · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10115635B2 cover?
- A wafer via solder filling device includes a solder bath comprising an accommodation space for accommodating a molten solder, with an open top, and an air outlet for exhausting air from the accommodation space; a fixing unit for fixing the wafer having a via formed in one surface in the accommodation space to seal the accommodation space airtight; and a pressing unit for pressing a bottom of th…
- Who is the assignee on this patent?
- Korea Inst Ind Tech
- What technology area does this patent fall under?
- Primary CPC classification H10W20/023. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).