Method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-10115583-B2
Application number	US-201715687717-A
Country	US
Kind code	B2
Filing date	Aug 28, 2017
Priority date	Feb 16, 2017
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

There is provided a method of manufacturing a semiconductor device which includes: supplying a process gas to a process chamber in a state in which a substrate with an insulating film formed thereon is mounted on a substrate support part inside the process chamber; supplying a first power from a plasma generation part to the process chamber to generate plasma and forming a first silicon nitride layer on the insulating film; and supplying a second power from an ion control part to the process chamber in parallel with the generation of plasma, to form a second silicon nitride layer having lower stress than that of the first silicon nitride layer on the first silicon nitride layer.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
supplying a process gas to a process chamber in a state in which a substrate with an insulating film formed thereon is mounted on a substrate support part inside the process chamber;
forming a first silicon nitride layer on the insulating film by supplying a first electric power from a plasma generation part to the process chamber and generating plasma of the process gas; and
forming a second silicon nitride layer, whose stress is lower than a stress of the first silicon nitride layer, on the first silicon nitride layer by supplying a second electric power from an ion control part to the process chamber in addition to supplying the first electric power and generating the plasma of the process gas.

2. The method of claim 1 , wherein in the act of forming the first silicon nitride layer, the plasma generation part is configured to supply a high-frequency power to the process chamber, and
in the act of forming the second silicon nitride layer, the plasma generation part is configured to supply a high-frequency power to the process chamber and the ion control part is configured to supply a low-frequency power to the process chamber.

3. The method of claim 2 , wherein, after the act of forming the second silicon nitride layer, the supply of the second electric power from the ion control part is stopped while the supply of the first electric power from the plasma generation part continues so that a third silicon nitride layer is formed on the second silicon nitride layer.

4. The method of claim 3 , wherein the ion control part includes a low-frequency power source, the low-frequency power source being configured to supply a low frequency in the form of a pulse.

5. The method of claim 4 , wherein the process gas contains argon.

6. The method of claim 5 , wherein a magnitude of the first electric power in the act of forming the first silicon nitride layer is configured to be greater than that of a high-frequency power in the act of forming the second silicon nitride layer.

7. The method of claim 3 , wherein the process gas contains argon.

8. The method of claim 2 , wherein the ion control part includes a low-frequency power source, the low-frequency power source being configured to supply a low frequency in the form of a pulse.

9. The method of claim 8 , wherein the process gas contains argon.

10. The method of claim 2 , wherein the process gas contains argon.

11. The method of claim 1 , wherein, after the act of forming the second silicon nitride layer, the supply of the second electric power from the ion control part is stopped while the supply of the first electric power from the plasma generation part continues so that a third silicon nitride layer is formed on the second silicon nitride layer.

12. The method of claim 11 , wherein the ion control part includes a low-frequency power source, the low-frequency power source being configured to supply a low frequency in the form of a pulse.

13. The method of claim 12 , wherein the process gas contains argon.

14. The method of claim 11 , wherein the process gas contains argon.

15. The method of claim 1 , wherein the ion control part includes a low-frequency power source, the low-frequency power source being configured to supply a low frequency in the form of a pulse.

16. The method of claim 15 , wherein the process gas contains argon.

17. The method of claim 1 , wherein the process gas contains argon.

18. The method of claim 17 , wherein a magnitude of the first electric power in the act of forming the first silicon nitride layer is configured to be greater than that of a high-frequency power in the act of forming the second silicon nitride layer.

19. The method of claim 1 , wherein a magnitude of the first electric power in the act of forming the first silicon nitride layer is configured to be greater than that of a high-frequency power in the act of forming the second silicon nitride layer.

Assignees

• Hitachi Int Electric Inc

Inventors

• Shimamoto Satoshi
• Ashihara Hiroshi
• Toyoda Kazuyuki
• Ohashi Naofumi

Classifications

• H10P50/283

  by chemical means · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6682

  the compound being a silane, e.g. disilane, methylsilane or chlorosilane · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/662

  Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548) · CPC title