Thin film dielectric stack

Patent metadata

Field	Value
Publication number	US-10115527-B2
Application number	US-201514642222-A
Country	US
Kind code	B2
Filing date	Mar 9, 2015
Priority date	Mar 9, 2015
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A system that incorporates teachings of the subject disclosure may include, for example, a fabricated thin film capacitor formed by depositing a first dielectric layer on a first electrode layer utilizing a first process that is performed at a first temperature, depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer, depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a second temperature and that forms a columnar-oriented grain structure for the third dielectric layer where the second temperature is higher than the first temperature, and depositing a second electrode layer on the third dielectric layer to form the thin film capacitor. Other embodiments are disclosed.

First claim

What is claimed is:

1. A method for fabricating a thin film capacitor, the method comprising:
determining a first temperature according to a material of a first electrode layer and according to a determination of a hillock temperature above which hillocks form on the material, wherein the first temperature is below the hillock temperature;
determining a second temperature according to the material of the first electrode layer and according to the determination of the hillock temperature, wherein the second temperature is below the hillock temperature;
depositing a first dielectric layer on the first electrode layer utilizing a first process that is performed at the first temperature;
depositing a second dielectric layer on the first dielectric layer utilizing a second process that is performed at the second temperature and that forms a randomly-oriented grain structure for the second dielectric layer;
depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a third temperature and that forms a columnar-oriented grain structure for the third dielectric layer, wherein the third temperature is higher than the first temperature; and
depositing a second electrode layer on the third dielectric layer to form the thin film capacitor, wherein the first and third processes result in an average grain size of the first dielectric layer being smaller than an average grain size of the third dielectric layer.

2. The method of claim 1 , wherein the first process forms a columnar-oriented grain structure for the first dielectric layer.

3. The method of claim 1 , wherein a thickness of the first dielectric layer is between 50 A to 200 A.

4. The method of claim 1 , wherein a thickness of the first dielectric layer is between 200 A to 700 A.

5. The method of claim 1 , wherein a thickness of the first dielectric layer is between 50 A to 700 A, wherein the first and third dielectric layers are formed from the same material, and wherein the third temperature is greater than 400 C.

6. The method of claim 1 , wherein a thickness of the third dielectric layer is between 300 A to 600 A.

7. The method of claim 1 , wherein a thickness of the third dielectric layer is between 600 A to 2000 A.

8. The method of claim 1 , wherein the first and third processes are sputtering processes, and wherein the first electrode layer is a patterned electrode that only partially covers a substrate.

9. The method of claim 1 , wherein the second process is one of a metal organic deposition process or a chemical solution deposition process, and further comprising repeating the depositing of the first, second and third dielectric layers and repeating the depositing of the second electrode layer to form multi-stacked capacitors.

10. The method of claim 1 , further comprising:
depositing the first electrode layer on a substrate;
depositing a metal interconnect layer to provide electrical connections for the thin film capacitor;
depositing a planarizing and insulating layer following patterning of the first, second and third dielectric layers; and
etching the planarizing and insulating layer to form vias
wherein the first, second and third dielectric layers comprise barium strontium titanate.

11. A method comprising:
depositing, via a first process, a first dielectric layer on a first electrode layer at a first temperature, wherein the first temperature is selected to be below a hillock temperature above which it is determined that hillocks form on the first electrode layer;
depositing, via a second process, a second dielectric layer on the first dielectric layer at a second temperature and to form a randomly-oriented grain structure for the second dielectric layer, wherein the second temperature is selected to be below the hillock temperature;
depositing, via a third process, a third dielectric layer on the second dielectric layer at a third temperature and to form a columnar-oriented grain structure for the third dielectric layer, wherein the third temperature is above the first temperature; and
depositing a second electrode layer on the third dielectric layer,
wherein the first and third processes are sputtering processes,
wherein the second process is one of a metal organic deposition process or a chemical solution deposition process, and
wherein a thickness of the second dielectric layer is between 300 A to 800 A.

12. The method of claim 11 , wherein the first process forms a columnar-oriented grain structure for the first dielectric layer.

13. The method of claim 11 , wherein the thickness of the second dielectric layer is between 300 A to 500 A.

14. The method of claim 11 , wherein the thickness of the second dielectric layer is between 500 A to 800 A.

15. The method of claim 11 , wherein the first and third processes result in an average grain size of the first dielectric layer being smaller than an average grain size for the third dielectric layer.

16. The method of claim 11 , further comprising repeating the depositing of the first, second and third dielectric layers and repeating the depositing of the second electrode layer to form first and second capacitors that are stacked on each other, wherein different first temperatures are utilized for the depositing the first dielectric layers of the first and second capacitors, wherein the first and third dielectric layers are formed from the same material, and wherein the third temperature is greater than 400 C.

17. A method for fabricating a thin film capacitor, the method comprising:
depositing a first dielectric layer on a first electrode layer utilizing a first process that forms a columnar-oriented grain structure for the first dielectric layer;
depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer;
depositing a third dielectric layer on the second dielectric layer utilizing a third process that forms another columnar-oriented grain structure for the third dielectric layer, wherein the first and third processes are selected to provide an average grain size of the first dielectric layer smaller than another average grain size for the third dielectric layer; and
depositing a second electrode layer on the third dielectric layer to form the thin film capacitor, wherein a thickness of the second dielectric layer is less than or equal to 800 A, and wherein the third dielectric layer has a thickness that is at least twice as thick as a combination of the first and second dielectric layers.

18. The method of claim 17 , wherein the thickness of the second dielectric layer is between 300 A to 800 A wherein the first process is performed at a first temperature, wherein the third process is performed at a second temperature, wherein the second temperature is higher than the first temperature, and wherein the first and third dielectric layers comprise a same material.

19. The method of claim 17 , wherein the thickness of the second dielectric layer is between 500 A to 800 A.

20. The method of claim 17 , wherein the thickness of the second dielectric layer is between 300 A to 500 A.

Assignees

• Blackberry Ltd

Inventors

• Zelner Marina
• Nagy Susan
• Cervin Andrew Vladimir Claude

Classifications

• H01G4/33 Primary

  Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/1227

  based on alkaline earth titanates · CPC title

• H01L28/56

  Electricity · mapped topic

• H01G4/085

  Vapour deposited · CPC title