Massively scalable object storage system
US-2016197996-A1 · Jul 7, 2016 · US
US10114784B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10114784-B2 |
| Application number | US-201514694732-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 23, 2015 |
| Priority date | Apr 25, 2014 |
| Publication date | Oct 30, 2018 |
| Grant date | Oct 30, 2018 |
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Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage assembly is provided that includes a plurality of storage drives each comprising a PCIe host interface and solid state storage media. The data storage assembly includes a PCIe switch circuit coupled to the PCIe host interfaces of the storage drives and configured to receive storage operations issued by one or more host systems over a shared PCIe interface and transfer the storage operations for delivery to the storage drives over selected ones of the PCIe host interfaces. The data storage assembly includes a control processor configured to monitor usage statistics of the storage drives, and power control circuitry configured to selectively remove the power from ones of the storage drives based at least on the usage statistics of the storage drives.
Opening claim text (preview).
What is claimed is: 1. A data storage assembly, comprising: a plurality of storage drives each comprising a drive Peripheral Component Interconnect Express (PCIe) interface and solid state storage media, with each of the plurality of storage drives configured to store and retrieve data responsive to storage operations received over the associated drive PCIe interface; a PCIe switch circuit coupled to the drive PCIe interfaces of the plurality of storage drives and configured to receive the storage operations issued by one or more host systems over a shared PCIe interface and transfer the storage operations for delivery to the plurality of storage drives over selected ones of the drive PCIe interfaces; a control processor configured to monitor activity levels of the drive PCIe interfaces of the plurality of storage drives; the control processor configured to alter properties of the drive PCIe interfaces for one or more of the plurality of storage drives based at least on the activity levels of the one or more of the plurality of storage drives, wherein the properties of the drive PCIe interfaces comprise one or more of a quantity of active PCIe lanes and a PCIe throughput; and the control processor configured to instruct power control circuitry to provide power to the one or more of the plurality of storage drives based at least on activity levels of the drive PCIe interfaces of the one or more of the plurality of storage drives being above a threshold activity level, and instruct the power control circuitry to remove the power from the one or more of the plurality of storage drives based at least on the activity levels indicating the one or more of the plurality of storage drives are dormant. 2. The data storage assembly of claim 1 , further comprising: the control processor configured to identify when input power is lost to the data storage assembly; holdup circuitry configured to provide power to at least the plurality of storage drives after input power is lost to the data storage assembly; and the control processor configured to instruct the holdup circuitry to provide the power to at least the plurality of storage drives based at least on the activity levels of the plurality of storage drives. 3. The data storage assembly of claim 1 , wherein the activity levels comprise PCIe traffic directed to the one or more of the plurality of storage drives over the shared PCIe interface. 4. The data storage assembly of claim 1 , comprising: when all of the plurality of storage drives of the data storage assembly have the power removed, then the control processor configured to instruct the power control circuitry to remove the power from the PCIe switch circuit. 5. The data storage assembly of claim 1 , comprising: after the plurality of storage drives of the data storage assembly have had the power removed, based at least on the activity levels rising above the threshold activity level for at least one of the plurality of storage drives, the control processor configured to instruct the power control circuitry to apply power to the PCIe switch circuit and the at least one the plurality of storage drives. 6. The data storage assembly of claim 1 , comprising: responsive to removing the power from the one or more of the plurality of storage drives, the power control circuitry configured to adjust at least one of a phase margin and gain margin of the power control circuitry according to a projected load of remaining powered ones of the plurality of storage drives. 7. The data storage assembly of claim 1 , comprising: responsive to removing power from the one or more of the plurality of storage drives, the power control circuitry configured to select circuit components among the power control circuitry for use by the power control circuitry to establish a predetermined efficiency for the power control circuitry. 8. A method of operating a data storage assembly, the method comprising: in a plurality of storage drives each comprising a drive Peripheral Component Interconnect Express (PCIe) interface and solid state storage media, storing and retrieving data responsive to storage operations received over an associated drive PCIe interface; in a PCIe switch circuit coupled to the drive PCIe interfaces of the plurality of storage drives, receiving the storage operations issued by one or more host systems over a shared PCIe interface and transferring the storage operations for delivery to the plurality of storage drives over selected ones of the drive PCIe interfaces; monitoring activity levels of the drive PCIe interfaces of the plurality of storage drives; altering properties of the drive PCIe interfaces for ones of the plurality of storage drives based at least on the activity levels of the ones of the plurality of storage drives, wherein the properties of the drive PCIe interfaces comprise one or more of a quantity of active PCIe lanes and a PCIe throughput; and instructing power control circuitry to provide power to the one or more of the plurality of storage drives based at least on the activity levels of the drive PCIe interfaces of the one or more of the plurality of storage drives being above a threshold activity level, and instructing the power control circuitry to remove the power from the one or more of the plurality of storage drives based at least on the activity levels indicating the ones of the plurality of storage drives are dormant. 9. The method of claim 8 , further comprising: identifying when input power is lost to the data storage assembly; in holdup circuitry, providing the power to at least the plurality of storage drives after the input power is lost to the data storage assembly based at least on the activity levels of the plurality of storage drives. 10. The method of claim 8 , wherein the activity levels comprise PCIe traffic directed to the one or more of the plurality of storage drives over the shared PCIe interface. 11. The method of claim 8 , further comprising: when all of the plurality of storage drives of the data storage assembly have the power removed, instructing the power control circuitry to remove power from the PCIe switch circuit. 12. The method of claim 8 , further comprising: after the plurality of storage drives of the data storage assembly have had the power removed, based at least on the activity levels rising above threshold activity level for at least one of the plurality of storage drives, instructing the power control circuitry to apply power to the PCIe switch circuit and the least one of the plurality of storage drives. 13. The method of claim 8 , further comprising: responsive to removing power from the one or more of the plurality of storage drives, adjusting at least one of a phase margin and gain margin of the power control circuitry according to a projected load of remaining powered ones of the plurality of storage drives. 14. The method of claim 8 , further comprising: responsive to removing power from the one or more of the plurality of storage drives, selecting circuit components among the power control circuitry for use by the power control circuitry to establish a predetermined efficiency for the power control circuitry. 15. A data storage module, comprising: a plurality of storage drives each configured to store and retrieve data responsive to storage operations received over associated drive interfaces; communication circuitry coupled to the drive interfaces of the plurality of storage drives and configured to receive the storage operations issued by one or more host systems over a shared interface and transfer the storage operations for deli
Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206) · CPC title
Arrangements for using multiple switchable power supplies, e.g. battery and AC (G06F1/30 takes precedence) · CPC title
Resetting or repowering · CPC title
in relation to availability · CPC title
Controller construction arrangements · CPC title
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