Data storage device and data processing system including the data storage device

Patent metadata

Field	Value
Publication number	US-10114550-B2
Application number	US-201615277496-A
Country	US
Kind code	B2
Filing date	Sep 27, 2016
Priority date	Jan 7, 2016
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A data storage device includes a first volatile memory device, a first scale-out storage, and a first controller. The first controller is configured to control the first volatile memory device and the first scale-out storage and to execute first firmware. The first scale-out storage includes a second volatile memory device, a first non-volatile memory device, and a second controller. The second controller is configured to control the second volatile memory device and the first non-volatile memory device and to execute second firmware. The first controller boots the first firmware after booting of the second firmware is completed by the second controller.

First claim

What is claimed is:

1. A data storage device, comprising:
a first volatile memory device;
a first scale-out storage;
a first controller configured to control the first volatile memory device and the first scale-out storage and to execute first firmware, and
a power management integrated circuit configured to supply a second operating voltage to the first scale-out storage at a second supply point and supply a first operating voltage to the first controller at a first supply point, wherein the second supply point comes earlier than the first supply point;
wherein the first scale-out storage comprises:
a second volatile memory device;
a first non-volatile memory device; and
a second controller configured to control the second volatile memory device and the first non-volatile memory device and to execute second firmware,
wherein the first controller is coordinated to boot the first firmware after booting of the second firmware is completed by the second controller.

2. The data storage device of claim 1 , wherein the first non-volatile memory device comprises:
a first block configured to store second full-firmware which comprises a second boot loader and the second firmware; and
a second block configured to store first full-firmware which comprises the first firmware, the second boot loader, and the second firmware.

3. The data storage device of claim 2 ,
wherein the first non-volatile memory device comprises a plurality of memory cells and each of the memory cells is either of a two-dimensional memory cell and a three-dimensional memory cell.

4. The data storage device of claim 2 ,
wherein the second controller loads the second boot loader from the first block to the second controller in response to a first physical read command output from the first controller, transmits the first full-firmware from the second block to the first controller using the second boot loader, and loads the second firmware from the first block to the second controller using the second boot loader, and
wherein commands involved in the transmission of the first full-firmware are second physical read commands including the first physical read command.

5. The data storage device of claim 4 ,
wherein the second controller loads the second boot loader from the first block to the second controller without using the second volatile memory device, initializes the second volatile memory device using the second boot loader, transmits the first full-firmware to the first controller via the second volatile memory device, and loads the second firmware to the second controller via the second volatile memory device.

6. The data storage device of claim 2 ,
wherein the first controller stores the first full-firmware transmitted from the second controller in the first volatile memory device, changes its own operating mode from a physical mode operating based on a physical address to a logical mode operating based on a logical address, and transmits an execution command to execute the second firmware to the second controller.

7. The data storage device of claim 6 ,
wherein the second controller executes the second firmware in response to the execution command and transmits an indicator signal indicating the execution of the second firmware to the first controller, and
wherein the first controller loads the first firmware included in the first full-firmware stored in the first volatile memory device in response to the indicator signal and executes the first firmware.

8. The data storage device of claim 7 ,
wherein the first controller which executes the first firmware transmits a version check command to the second controller and the second controller transmits version information of the second firmware to the first controller in response to the version check command.

9. The data storage device of claim 1 , wherein the first controller is configured to perform operations comprising:
receiving first full-firmware which comprises the first firmware, a second boot loader, and the second firmware from an external device connected to the first controller;
storing the first full-firmware in the first volatile memory device;
changing its own operating mode from a physical mode operating based on a physical address to a logical mode operating based on a logical address; and
transmitting the second boot loader to the second controller using a first logical command, and
wherein the second controller initializes the second volatile memory device using the second boot loader.

10. The data storage device of claim 9 ,
wherein the first controller transmits second full-firmware which comprises the second boot loader and the second firmware to the second controller using a second logical command,
wherein the second controller writes the second full-firmware to a first block of the first non-volatile memory device via the second volatile memory device,
wherein the first controller transmits the first full-firmware to the second controller using a third logical command, and
wherein the second controller writes the first full-firmware to a second block of the first non-volatile memory device via the second volatile memory device.

11. The data storage device of claim 10 ,
wherein the first controller transmits an execution command indicating execution of the second firmware to the second controller, and
wherein the second controller loads and executes the second firmware included in the second full-firmware stored in the second volatile memory device in response to the execution command and transmits an indicator signal indicating that the second firmware is executed to the first controller; and
wherein the first controller loads the first firmware included in the first full-firmware stored in the first volatile memory device in response to the indicator signal and executes the first firmware.

12. The data storage device of claim 9 ,
wherein the external device is either of a host and a second scale-out storage, and
wherein the second scale-out storage comprises:
a third volatile memory device;
a second non-volatile memory device configured to store the first full-firmware; and
a third controller configured to control the third volatile memory device and the second non-volatile memory device.

13. The data storage device of claim 1 ,
wherein the first controller comprises first general-purpose input/output (GPIO) pins; wherein the second controller comprises second GPIO pins;
wherein the first GPIO pins are connected with the second GPIO pins, respectively; and
wherein each of the first and second controllers checks a state of one of the first GPIO pins and determines whether an operating mode of the data storage device is a boot mode or a download mode.

14. The data storage device of claim 13 ,
wherein the first non-volatile memory device comprises:
a first block configured to store second full-firmware which comprises a second boot loader and the second firmware; and
a second block configured to store first full-firmware which comprises the first firmware, the second boot loader, and the second firmware, and

wherein when the operating mode is the boot mode, the second controller transmits the first full-firmware stored in the second block to the first controller, loads the second firmware stored in the first block to the second controller, executes the second firmware in response to an execution command indicating execution of the second firmware, transmits an indicator signal indicating that the second firmware is executed to the first controller; and the first controller downloads the first firmware included in the first full-firmwa

Assignees

• Samsung Electronics Co Ltd

Inventors

• Ryu In-Sik
• Lee Tae Min
• Jung Da Woon

Classifications

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F2212/205

  Hybrid memory, e.g. using both volatile and non-volatile memory · CPC title

• G06F12/0638

  Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module (address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70) · CPC title

• G06F3/0607 Primary

  by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title