Group III nitride crystal substrate, epilayer-containing group III nitride crystal substrate, semiconductor device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10113248-B2
Application number	US-201715623077-A
Country	US
Kind code	B2
Filing date	Jun 14, 2017
Priority date	Jun 23, 2005
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A group III nitride crystal substrate is provided, wherein, a uniform distortion at a surface layer of the crystal substrate is equal to or lower than 1.7×10 −3 , and wherein a plane orientation of the main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to a plane including a c axis of the crystal substrate. A group III nitride crystal substrate suitable for manufacturing a light emitting device with a blue shift of an emission suppressed, an epilayer-containing group III nitride crystal substrate, a semiconductor device and a method of manufacturing the same can thereby be provided.

First claim

What is claimed is:

1. A wafer comprising a semiconductor device structure including a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,
a plane spacing of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes of said crystal substrate are satisfied,
a uniform distortion at a surface layer of said crystal substrate represented by a value of |d 1 −d 2 |/d 2 is equal to or lower than 1.7×10 −3 where d 1 indicates a plane spacing at said X-ray penetration depth of 0.3 μm and d 2 indicates a plane spacing at said X-ray penetration depth of 5 μm, and wherein
a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of crystal substrate,
wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

2. A wafer comprising a semiconductor device structure including a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,
on a diffraction intensity profile of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes are satisfied,
an irregular distortion at a surface layer of said crystal substrate represented by a value of |v 1 −v 2 | obtained from a half value width v 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width v 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 110 arcsec, and wherein
a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate,
wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

3. A wafer comprising a semiconductor device structure including a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,
on a rocking curve being measured by varying an X-ray penetration depth from a main surface of said crystal substrate in connection with X-ray diffraction of arbitrary specific parallel crystal lattice planes of said crystal substrate,
a plane orientation deviation of said specific parallel crystal lattice planes of a surface layer of said crystal substrate represented by a value of |w 1 −w 2 | obtained from a half value width w 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width w 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 300 arcsec, and wherein
a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate,
wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

4. The wafer according to claim 1 , wherein said main surface has a surface roughness Ra of 5 nm or lower.

5. The wafer according to claim 1 , wherein the plane orientation of said main surface has an inclination angle equal to or greater than 0° and smaller than 0.1° with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate so as to be substantially parallel thereto.

6. The wafer according to claim 1 , wherein the plane orientation of said main surface has an inclination angle equal to or greater than 0.1° and equal to or smaller than 10° with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate.

7. The wafer according to claim 1 , wherein oxygen present at said main surface has a concentration of equal to or more than 2 at. % and equal to or less than 16 at. %.

8. The wafer according to claim 1 , wherein a dislocation density at said main surface is equal to or less than 1×10 7 cm −2 .

9. The wafer according to claim 1 , having a diameter equal to or more than 40 mm and equal to or less than 150 mm.

Assignees

• Sumitomo Electric Industries

Inventors

• Ishibashi Keiji
• Yoshizumi Yusuke
• Minobe Shugo

Classifications

• C30B21/02

  by normal casting or gradient freezing · CPC title

• Y10T428/24355

  Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.] · CPC title

• C30B29/403

  AIII-nitrides · CPC title

• C30B33/00 Primary

  After-treatment of single crystals or homogeneous polycrystalline material with defined structure (C30B31/00 takes precedence) · CPC title

• Y10T428/21

  Circular sheet or circular blank · CPC title