Integrated biasing for pin diode drivers

Patent metadata

Field	Value
Publication number	US-10110218-B2
Application number	US-201615356322-A
Country	US
Kind code	B2
Filing date	Nov 18, 2016
Priority date	Nov 18, 2016
Publication date	Oct 23, 2018
Grant date	Oct 23, 2018

Abstract

Radio-frequency signals may be switched between signal lines or signal ports in RF circuits using PIN diodes and PIN-diode driving circuitry. To achieve switching, the PIN diodes are biased at voltages as high as 20 volts or more. Circuitry for biasing PIN diodes is described that uses a low-voltage power source and a single-bit control line.

First claim

What is claimed is:

1. A driver circuit for biasing PIN diodes comprising:
a substrate on which the driver circuit is assembled;
a supply voltage contact configured to receive electrical power from a power source;
a boost converter connected to the supply voltage contact and configured to increase a first voltage received from the power source to a second voltage;
a low-dropout regulator configured to convert the second voltage to a third voltage; and
PIN diode bias driver circuitry connected to an output of the low-dropout regulator and arranged to bias at least one PIN diode.

2. The driver circuit of claim 1 , wherein the boost converter comprises two transistors and switching circuitry configured to switch current through an inductor that attaches to two inductor contacts on the substrate that are connected to the two transistors.

3. The driver circuit of claim 2 , wherein an input of the low-dropout regulator is arranged to connect to a cathode of a diode having an anode that connects to the inductor.

4. The driver circuit of claim 1 , wherein the first voltage is between approximately 2.5 volts and approximately 7 volts and the second voltage is between approximately 20 volts and approximately 35 volts.

5. The driver circuit of claim 4 , wherein the third voltage is less than the second voltage and is between approximately 19 volts and approximately 34 volts.

6. The driver circuit of claim 1 , wherein the supply voltage contact is the only contact for receiving power that powers the driver circuit.

7. The driver circuit of claim 1 , wherein the PIN diode bias driver circuitry comprises:
a receive PIN diode biasing circuit connected to an output of the low-dropout regulator;
a transmit PIN diode biasing circuit connected to the output of the low-dropout regulator; and
a shunt PIN diode biasing circuit connected to the output of the low-dropout regulator.

8. The driver circuit of claim 7 , further comprising a TTL buffer configured to receive commands to activate or deactivate the receive PIN diode biasing circuit, the transmit PIN diode biasing circuit, and the shunt PIN diode biasing circuit.

9. The driver circuit of claim 8 , wherein the TTL buffer is further configured to output an enable signal that indicates when at least one of the receive PIN diode biasing circuit, the transmit PIN diode biasing circuit, or the shunt PIN diode biasing circuit is activated.

10. The driver circuit of claim 7 , wherein one or more of the receive PIN diode biasing circuit, the transmit PIN diode biasing circuit, and the shunt PIN diode biasing circuit comprises:
a first transistor having a drain connected to receive an output voltage from the low-dropout regulator;
a first buffer configured to receive power from the low-dropout regulator, to be referenced to a reference voltage that is less than a voltage from the low-dropout regulator and greater than zero volts, and to drive a gate of the first transistor;
a second transistor having a drain connected to a source of the first transistor; and
a second buffer configured to drive a gate of the second transistor.

11. The driver circuit of claim 10 , wherein the reference voltage is between 2.5 volts and 7 volts less than a voltage received from the low-dropout regulator.

12. The driver circuit of claim 10 , further comprising:
a first level shifter having an output connected to an input of the first buffer; and
a second level shifter having an output connected to an input of the second buffer.

13. The driver circuit of claim 1 , further comprising plural PIN diodes assembled on the substrate and connected to the PIN diode bias driver circuitry.

14. The driver circuit of claim 13 , further comprising:
an antenna contact coupled to a node between a receive PIN diode and a transmit PIN diode of the plural PIN diodes;
a receive contact coupled to a node between the receive PIN diode and a shunt PIN diode of the plural PIN diodes; and
a transmit contact coupled to the transmit PIN diode, wherein the PIN diode bias driver circuitry is configured to bias the plural PIN diodes to switch RF signals from or to the antenna contact between the receive contact and the transmit contact.

15. The driver circuit of claim 14 , further comprising a low noise amplifier assembled on the substrate and connected to a cathode of the receive PIN diode.

16. A method for biasing PIN diodes with a driver circuit, the method comprising:
receiving, at the driver circuit assembled on a substrate, a first supply voltage;
increasing, with a boost converter assembled on the substrate, the first supply voltage to a second voltage;
reducing, with a low-dropout regulator assembled on the substrate, the second voltage to a third voltage; and
powering, with an output from the low-dropout regulator, PIN diode bias driver circuitry that is assembled on the substrate.

17. The method of claim 16 , wherein the first supply voltage is the only supply voltage received by the driver circuit.

18. The method of claim 16 , wherein increasing the first supply voltage to the second voltage comprises switching two transistors to drive current through a single inductor.

19. The method of claim 16 , wherein the first supply voltage is between approximately 2.5 volts and approximately 7 volts and the second voltage is between approximately 20 volts and approximately 35 volts.

20. The method of claim 19 , wherein the third voltage is less than the second voltage and is between approximately 19 volts and approximately 34 volts.

21. The method of claim 16 , further comprising:
referencing first buffers in the PIN diode bias driver circuitry with a reference voltage that is between 2.5 volts and 7 volts less than an output voltage from the low-dropout regulator and greater than zero volts; and
powering, with the first supply voltage, second buffers in the PIN diode bias driver circuitry, wherein the first buffers and second buffers drive are configured to drive first and second transistors that output a bias voltage.

22. The method of claim 16 , further comprising transmitting single-bit control signals to the PIN diode bias driver circuitry that alter a bias on the PIN diodes.

23. The method of claim 22 , wherein the PIN diodes are assembled as a switch on the substrate and wherein the control signals cause the PIN diodes to switch RF signals between a receive port and a transmit port of the driver circuit.

24. The method of claim 23 , further comprising:
providing an enable signal for an amplifier responsive to activating the PIN diodes to be in a first state; and
activating the amplifier responsive to receiving the enable signal.

25. The method of claim 24 , wherein the amplifier is a low-noise amplifier connected to the receive port.

Assignees

• Macom Tech Solutions Holdings Inc

Inventors

• Foley Brendan
• Bazzani Cristiano
• Dowling Michelle

Classifications

• H03F3/19

  with semiconductor devices only · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03K17/567 Primary

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• G05F1/46

  wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

• H05K999/99

  Electricity · mapped topic