Charge pump with a rapid-discharge path

Patent metadata

Field	Value
Publication number	US-10110121-B2
Application number	US-201715725594-A
Country	US
Kind code	B2
Filing date	Oct 5, 2017
Priority date	Oct 19, 2016
Publication date	Oct 23, 2018
Grant date	Oct 23, 2018

Abstract

A charge pump includes a first unidirectional conducting device, a flying capacitor, a second unidirectional conducting device, an output capacitor, a first switch, and a second switch. The first unidirectional conducting device unidirectionally couples a supply voltage to an internal node. The flying capacitor is coupled between the internal node and a clock signal. The second unidirectional conducting device unidirectionally couples the internal node to an output node. The output capacitor is coupled between the output node and a ground. The first switch couples a discharge node to the ground according to a discharge signal. The second switch couples the output node to the discharge node according to the voltage of the internal node.

First claim

What is claimed is:

1. A charge pump, comprising:
a first unidirectional conducting device, unidirectionally coupling a supply voltage to an internal node;
a flying capacitor, coupled between the internal node and a clock signal;
a second unidirectional conducting device, unidirectionally coupling the internal node to an output node;
an output capacitor, coupled between the output node and a ground;
a first switch, coupling a discharge node to the ground according to a discharge signal; and
a second switch, coupling the output node to the discharge node according to a voltage of the internal node.

2. The charge pump of claim 1 , wherein the clock signal comprises a high voltage level and a low voltage level, wherein the high voltage level is equal to the supply voltage and the low voltage level is equal to the ground.

3. The charge pump of claim 2 , wherein when the clock signal is at the low voltage level, the flying capacitor is charged by the supply voltage through the first unidirectional conducting device, wherein when the clock signal is at the high voltage level, a voltage of the internal node is boosted to twice the supply voltage and charges the output capacitor through the second unidirectional conducting device.

4. The charge pump of claim 3 , wherein when the discharge signal is equal to the supply voltage, an output voltage of the output node is discharged to the ground through the first switch and the second switch.

5. The charge pump of claim 4 , wherein when the discharge signal is equal to the supply voltage, the first switch is turned ON to discharge the discharge node to the ground, wherein when the voltage of the internal node is boosted to twice the supply voltage, the second switch is turned ON to discharge the output voltage to the discharge node.

6. The charge pump of claim 1 , wherein the first switch comprises a first N-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is controlled by the discharge signal, the source terminal is coupled to the ground, the drain terminal is coupled to the discharge node, and the bulk terminal is coupled to the ground.

7. The charge pump of claim 6 , wherein the second switch comprises a second N-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is controlled by a voltage of the internal node, the source terminal is coupled to the discharge node, the drain terminal is coupled to the output node, and the bulk terminal is coupled to the ground.

8. The charge pump of claim 7 , wherein a junction breakdown voltage and a gate oxide breakdown voltage of the first N-type transistor and the second N-type transistor are less than an output voltage of the output node.

9. The charge pump of claim 1 , wherein the first unidirectional conducting device comprises a first P-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is coupled to the internal node, the source terminal is coupled to the internal node, the drain terminal is supplied by the supply voltage, and the bulk terminal is coupled to the internal node.

10. The charge pump of claim 9 , wherein the second unidirectional conducting device comprises a second P-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is coupled to the output node, the source terminal is coupled to the output node, the drain terminal is coupled to the internal node, and the bulk terminal is coupled to the output node.

11. The charge pump of claim 10 , wherein a junction breakdown voltage and a gate oxide breakdown voltage of the first P-type transistor and the second P-type transistor are less than an output voltage of the output node.

12. A charge pump, comprising:
a first unidirectional conducting device, unidirectionally coupling a supply voltage to a first internal node;
a first flying capacitor, coupled between the first internal node and a first clock signal;
a second unidirectional conducting device, unidirectionally coupling the first internal node to a second internal node;
a second flying capacitor, coupled between the second internal node and a second clock signal;
a third unidirectional conducting device, unidirectionally coupling the second internal node to an output node;
an output capacitor, coupled between the output node and a ground;
a first switch, coupling a first discharge node to the ground according to a discharge signal;
a second switch, coupling a second discharge node to the first discharge node according to a voltage of the first internal node; and
a third switch, coupling the output node to the second discharge node according to a voltage of the second internal node.

13. The charge pump of claim 12 , wherein the first clock signal and the second clock signal comprise a high voltage level and a low voltage level, wherein the high voltage level is equal to the supply voltage and the low voltage level is equal to the ground.

14. The charge pump of claim 13 , wherein when the first clock signal is at the low voltage level, the first flying capacitor is charged by the supply voltage through the first unidirectional conducting device, wherein when the first clock signal is at the high voltage level and the second clock signal is at the low voltage level, a voltage of the first internal node is boosted to twice the supply voltage and charges the second flying capacitor, wherein when the second clock signal is at the high voltage level, a voltage of the second internal node is boosted to triple the supply voltage and charges the output capacitor through the third unidirectional conducting device.

15. The charge pump of claim 14 , wherein when the discharge signal is equal to the supply voltage, an output voltage of the output node is discharged to the ground through the first switch, the second switch, and the third switch.

16. The charge pump of claim 15 , wherein when the discharge signal is equal to the supply voltage, the first switch is turned ON to discharge the discharge node to the ground, wherein when the voltage of the first internal node is boosted to twice the supply voltage, the second switch is turned ON to discharge the voltage of the second discharge node to the first discharge node, wherein when the voltage of the second internal node is boosted to triple the supply voltage, the third switch is turned ON to discharge the output voltage to the second discharge node.

17. The charge pump of claim 12 , wherein the first switch comprises a first N-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is controlled by the discharge signal, the source terminal is coupled to the ground, the drain terminal is coupled to the first discharge node, and the bulk terminal is coupled to the ground.

18. The charge pump of claim 17 , wherein the second switch comprises a second N-type transistor comprising a gate terminal, a source terminal, a drain terminal, and a bulk terminal, wherein the gate terminal is controlled by a voltage of the first internal node, the source terminal is coupled to the first discharge node, the drain terminal is coupled to the second discharge node, and the bulk terminal is coupled to the ground.

19. The charge pump of claim 18 , wherein the third switch comprises a third N-type transistor comprising a gate terminal, a source termin

Assignees

• Fortemedia Inc

Inventors

• Opris Ion
• Kamal Abu Hena M
• Chew Lee Tay
• Chen Shomo

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H02M3/073 Primary

  Charge pumps of the Schenkel-type · CPC title

• H02M2001/322

  Electricity · mapped topic

• H02M2003/075

  Electricity · mapped topic

• H02M3/075

  including a plurality of stages and two sets of clock signals, one set for the odd and one set for the even numbered stages · CPC title