Package with embedded electronic components and a waveguide cavity through the package cover, antenna apparatus including package, and method of manufacturing the same

US10109604B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10109604-B2
Application numberUS-201615078527-A
CountryUS
Kind codeB2
Filing dateMar 23, 2016
Priority dateMar 30, 2015
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A package for embedding one or more electronic components comprises a carrier structure a silicon-based carrier layer, one or more electronic components embedded in one or more cavities formed in the carrier layer, and a cover structure arranged on top of the carrier structure. The cover structure comprises a cover layer and one or more cavities formed in the cover layer. An antenna element and/or a waveguide for connection to an antenna element is formed in and/or on top of the cover layer and coupled to the one or more cavities.

First claim

Opening claim text (preview).

The invention claimed is: 1. A package for embedding one or more electronic components, the package comprising: a carrier structure including a silicon-based carrier layer comprising one or more cavities for placing one or more electronic components therein, a first polymer layer located on top of the carrier layer, a second polymer layer located on top of the first polymer layer, metallization layers for use as signaling and ground layers located in predetermined areas between the first polymer layer and the second polymer layer and on top of the second polymer layer, and interconnection terminals for interconnecting the one or more electronic components and the metallization layers; one or more electronic components embedded in the one or more cavities in the carrier layer; and a cover structure arranged on top of the carrier structure, the cover structure including a cover layer of silicon or a mold mass, one or more cavities located at least partly above one or more of the metallization layers used as signaling layers, and a waveguide for connection to an external antenna element, the waveguide located in the cover layer and coupled to the one or more cavities, wherein the waveguide is formed through the cover structure in a direction perpendicular to the cover layer, and a flexible waveguide section is connected with a first end to the waveguide on a side of the waveguide facing away from the carrier structure. 2. The package as claimed in claim 1 , wherein the waveguide is rectangular, and the waveguide is directly connected to a cavity of the one or more cavities. 3. The package as claimed in claim 2 , therein the rectangular waveguide is filled with air or a filling material. 4. The package as claimed in claim 2 , further comprising a metal coating layer formed on an inner surface of the waveguide or an inner surface of a waveguide backshort. 5. The package as claimed in claim 1 , further comprising a rectangular waveguide backshort formed in the carrier layer opposite the waveguide or a cavity formed in the cover layer. 6. The package as claimed in claim 5 , wherein the rectangular waveguide backshort is filled with a polymer filling material. 7. The package as claimed in claim 1 , further comprising: a signal feeding element for signal feeding into the waveguide, wherein the signal feeding element comprises a microstrip feeding line. 8. An antenna apparatus, comprising: the package as claimed in claim 1 ; one or more antenna elements formed on the package or arranged separate from and coupled to the package; and a board supporting the package. 9. The antenna apparatus as claimed in claim 8 , further comprising a plurality of flexible waveguide sections and an antenna element per waveguide section coupled to the second end of the respective waveguide section, said antenna elements forming an antenna array. 10. A method of manufacturing a package for embedding one or more electronic components, the method comprising: forming a carrier structure by: forming in a silicon-based carrier layer one or more cavities; placing one or more electronic components in said one or more cavities; forming a first polymer layer on top of the carrier layer; forming a second polymer layer on top of the first polymer layer; forming metallization layers for use as signaling and ground layers in predetermined areas between the first polymer layer and the second polymer layer and on top of the second polymer layer; and forming interconnection terminals for interconnecting the one or more electronic components and the metallization layers; and forming a cover structure on top of the carrier structure by: forming a cover layer of silicon or a mold mass, wherein one or more cavities are formed at least partly above one or more metallization layers used as signaling layers; and forming a waveguide for connection to an external antenna element in the cover layer and coupled to the one or more cavities, wherein the waveguide is formed through the cover structure in a direction perpendicular to the cover layer, and a flexible waveguide section is connected with a first end to the waveguide on a side of the waveguide facing away from the carrier structure.

Assignees

Inventors

Classifications

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

  • Configurations of laterally-adjacent chips · CPC title

  • the substrate having spherical bumps for external connection · CPC title

  • on encapsulations · CPC title

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Frequently asked questions

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What does patent US10109604B2 cover?
A package for embedding one or more electronic components comprises a carrier structure a silicon-based carrier layer, one or more electronic components embedded in one or more cavities formed in the carrier layer, and a cover structure arranged on top of the carrier structure. The cover structure comprises a cover layer and one or more cavities formed in the cover layer. An antenna element and…
Who is the assignee on this patent?
Sony Corp
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).