Display processor and method for display processing

US10109260B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10109260-B2
Application numberUS-201314766986-A
CountryUS
Kind codeB2
Filing dateFeb 12, 2013
Priority dateFeb 12, 2013
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display processor device is for processing display image data by overlaying a multitude of image layers. Pixel values of at least one of the image layers are stored in a memory and may comprise pixels values having a single predefined value, such as transparency. The display processor has a fetch unit for selectively fetching stored pixel values from the memory by skipping stored pixels values having the single predefined value according to a fetch mask indicative of pixels values having the single predetermined value. Advantageously the bandwidth for accessing the memory is reduced, because less pixel data values need be retrieved. Power consumption may be reduced, and slower memories may be applied.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display processor device for processing display image data by overlaying a multitude of image layers to display images on a display with a display area of the entire display, the display processor comprising: a memory configured to store pixel values of at least one of the image layers, wherein the display image data comprises one or more pixel values of a single predefined value; a fetch unit, coupled to the memory, and configured to selectively fetch stored pixel values from the memory by skipping stored pixels values having the single predefined value according to a fetch mask, wherein the fetch mask spans the display area and corresponds to pixels values having the single predetermined value. 2. The display processor device as claimed in claim 1 , wherein the fetch mask is a bit mask having bit values, each bit value indicating whether a corresponding pixel has the single predefined value. 3. The display processor device as claimed in claim 1 , wherein the fetch mask is a bit mask having bit values, each bit value indicating whether a corresponding set of pixels have the single predefined value. 4. The display processor device as claimed in claim 3 , wherein the memory data amount of the pixel values of the set of pixels corresponds to a retrieval unit having multiple bytes retrievable from the memory by a single memory access operation. 5. The display processor device as claimed in claim 1 , wherein each layer of the multitude of image layers has a corresponding fetch mask. 6. The display processor device as claimed in claim 1 , wherein the fetch unit is arranged for retrieving the fetch mask from the memory. 7. The display processor device as claimed in claim 1 , wherein the fetch unit is arranged for generating the fetch mask for an image layer based on fetching said layer initially in full from the memory. 8. The display processor device as claimed in claim 1 , wherein the fetch unit is arranged for preloading the fetch mask for an image layer before fetching said layer from the memory. 9. The display processor device as claimed in claim 1 , wherein the fetch mask is available in a compressed form and the fetch unit is arranged for decompressing the fetch mask. 10. The display processor device as claimed in claim 1 , wherein the single predefined value is indicative of a transparency of the pixel in the overlaying. 11. The display processor device as claimed in claim 1 , wherein the single predefined value is indicative of a single color of the pixel. 12. The method of generating display image data as claimed in claim 1 , comprising generating the fetch mask for an image layer based on processing said layer in full. 13. The method of generating display image data as claimed in claim 12 , wherein said generating the fetch mask is performed off-line before operationally generating the display image data. 14. The method of generating display image data as claimed in claim 12 , wherein the method comprises compressing the fetch mask. 15. An integrated circuit comprising at least one electronic device according to claim 1 . 16. A method of generating display image data displayed on a display with a display area of the entire display, the method comprising: storing pixel values of at least one image layer of a plurality of image layers of the display image data; selectively fetching stored pixel values from the memory by skipping stored pixels values having a single predefined value according to a fetch mask indicative of pixels values having the single predetermined value, wherein the fetch mask spans the display area. 17. The method of generating display image data as claimed in claim 16 , wherein the fetch mask is a bit mask having bit values, each bit value indicating whether a corresponding pixel has the single predefined value. 18. The method of generating display image data as claimed in claim 16 , wherein each layer of the multitude of image layers has a corresponding fetch mask, or only a subset of the multitude of image layers has a corresponding fetch mask. 19. The method of generating display image data as claimed in claim 16 , comprising preloading the fetch mask for an image layer before fetching said layer from the memory.

Assignees

Inventors

Classifications

  • Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels · CPC title

  • Creating or editing images; Combining images with text · CPC title

  • Display of multiple viewports · CPC title

  • G09G5/397Primary

    Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay (G09G5/02 takes precedence) · CPC title

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Frequently asked questions

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What does patent US10109260B2 cover?
A display processor device is for processing display image data by overlaying a multitude of image layers. Pixel values of at least one of the image layers are stored in a memory and may comprise pixels values having a single predefined value, such as transparency. The display processor has a fetch unit for selectively fetching stored pixel values from the memory by skipping stored pixels value…
Who is the assignee on this patent?
Staudenmaier Michael, Aubineau Vincent, Rozen Anton, and 1 more
What technology area does this patent fall under?
Primary CPC classification G09G5/397. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).