Detecting potentially defective packaged radio-frequency modules

Patent metadata

Field	Value
Publication number	US-10109047-B2
Application number	US-201615384262-A
Country	US
Kind code	B2
Filing date	Dec 19, 2016
Priority date	Sep 28, 2012
Publication date	Oct 23, 2018
Grant date	Oct 23, 2018

Abstract

Systems and methods for identifying potentially defective individual packaged modules are presented. A printed circuit board (PCB) having individual module substrates can be received. An image of the PCB is captured and a PCB recipe associated with the PCB is loaded. For each individual module substrate, a portion of the image corresponding to the individual module substrate is compared to the PCB recipe. It can be determined based on the comparison whether the individual module substrate matches the PCB recipe within a degree of tolerance. When an individual module substrate does not match the PCB recipe within the degree of tolerance, a location of the individual module substrate within a map of the PCB can be stored.

First claim

What is claimed is:

1. A method of identifying potentially defective individual packaged modules, the method comprising:
receiving a Printed Circuit Board (PCB) including a set of individual module substrates;
capturing an image of a first side of the PCB;
loading a PCB recipe associated with the PCB;
for each individual module substrate of the set of individual module substrates, comparing a portion of the image of the first side of the PCB corresponding to the individual module substrate to the PCB recipe, determining based on the comparison whether the individual module substrate matches the PCB recipe within a degree of tolerance, and in response to determining that the individual module substrate does not match the PCB recipe within the degree of tolerance, storing a location of the individual module substrate within a map of the PCB; and
counting all stored locations in the map for the set of individual module substrates to enable tracking of PCB yield.

2. The method of claim 1 further comprising, for each individual module substrate of the set of individual module substrates, creating a marking at a location on a second side of the PCB corresponding to the individual module substrate, the second side opposite to the first side of the PCB.

3. The method of claim 2 wherein creating a marking includes rotating the PCB so that a second face of the PCB faces an inking tool.

4. The method of claim 1 wherein the map identifies individual module substrates of the PCB that are potentially defective.

5. The method of claim 1 wherein capturing the image of the first side of the PCB includes capturing multiple images of the first side of the PCB, each image corresponding to a different portion of the first side of the PCB.

6. The method of claim 1 further comprising identifying a PCB model of the PCB.

7. The method of claim 5 wherein identifying the PCB model includes receiving the identity of the PCB model from a user.

8. The method of claim 5 wherein identifying the PCB model includes determining the PCB model based on the image of the PCB.

9. The method of claim 5 wherein identifying the PCB model includes scanning a machine-readable code on the PCB and identifying the PCB model based on information encoded in the machine-readable code.

10. The method of claim 5 wherein the PCB recipe corresponds to the PCB model.

11. A system for identifying potentially defective individual packaged modules, the system comprising:
a Printed Circuit Board (PCB) loader configured to load a PCB, the PCB including a set of individual module substrates;
an image capture module configured to capture an image of a first side of the PCB;
a PCB recipe loader configured to load a PCB recipe corresponding to the PCB;
an image processor configured, for each individual module substrate of the set of individual module substrates, to compare a portion of the image of the first side of the PCB corresponding to the individual module substrate to the PCB recipe, and to determine based on the comparison whether the individual module substrate matches the PCB recipe within a degree of tolerance; and
a mapping module configured to store a location of the individual module substrate within a map of the PCB in response to the image processor determining that the individual module substrate does not match the PCB recipe within the degree of tolerance and configured to count all stored locations in the map for the set of individual module substrates to enable tracking of PCB yield.

12. The system of claim 11 wherein the map identifies individual module substrates of the PCB that are potentially defective.

13. The system of claim 11 further comprising a marking module configured, for each individual module substrate of the set of individual module substrates, to create a marking at a location on a second side of the PCB, the location corresponding to the individual module substrate.

14. The system of claim 11 wherein the image capture module is further configured to capture multiple images of the first side of the PCB, each image corresponding to a different portion of the first side of the PCB.

15. The system of claim 11 further comprising a PCB identifier configured to identify a PCB model of the PCB.

16. The system of claim 15 wherein the PCB identifier is configured to identify the PCB model based on the image of the PCB.

17. The system of claim 16 wherein the PCB identifier is configured to scan a machine-readable code on the PCB and to identify the PCB model based on information encoded in the machine-readable code.

18. A system for identifying potentially defective individual packaged modules, the system comprising:
a Printed Circuit Board (PCB) loader configured to load a PCB, the PCB including a set of individual module substrates;
an image capture module configured to capture an image of a first face of the PCB;
a processor configured to identify, using the image of the first face of the PCB, potentially defective individual module substrates of the PCB based on a first set of markings included on the potentially defective individual module substrates, and to count the first set of markings thereby enabling tracking of PCB yield;
a mapping module configured to create a map of the marked individual module substrates based on the first set of markings; and
an overmold module configured to form an overmold over at least a portion of the first face of the PCB, the overmold covering the first set of markings.

19. The system of claim 18 wherein the system further comprises a marking module configured to mark locations on the PCB corresponding to potentially defective individual module substrates to create a second set of markings, the locations identified via the map.

20. The system of claim 18 further comprising a PCB recipe loader configured to load a PCB recipe corresponding to a PCB model of the PCB.

Assignees

• Skyworks Solutions Inc

Inventors

• Nava Carlos Fabian
• Almonte Viviano

Classifications

• G06T7/0004

  Industrial image inspection · CPC title

• G06T2207/30141

  Printed circuit board [PCB] · CPC title

• H05K13/08

  Monitoring manufacture of assemblages · CPC title

• G06T7/001 Primary

  using an image reference approach · CPC title

• G06T7/0006 Primary

  using a design-rule based approach · CPC title