Chip tracking with marking database

US10108925B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10108925-B1
Application numberUS-201615204924-A
CountryUS
Kind codeB1
Filing dateJul 7, 2016
Priority dateJul 7, 2016
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Techniques for improved semiconductor inventory tracking, control, and testing are provided. The techniques include marking the semiconductor packaging with a 2-dimensional (“2D”) bar code that is stored in a data server. The data server associates the 2D barcode with performance data for the semiconductor, as well as with a “circuit-based identifier,” which comprises hard-wired electrical features that uniquely identify the semiconductor and that are embedded within the semiconductor. Associating the 2D bar code with chip performance reduces the number of times that a chip needs to be tested. Associating the 2D bar code with the circuit-based identifier provides certain functionality such as anti-counterfeiting functionality, device verification, and the like.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for tracking information for circuit packages, the method comprising: identifying a first circuit-based identifier value encoded into a first circuit package of the circuit packages; identifying a first mark value for a first mark on a surface of the first circuit package; associating the first circuit-based identifier value with the first mark value in a centralized data store to generate a first association; receiving a request to obtain information for the first circuit package, the request including a second mark value; and comparing the second mark value to the first mark value to obtain the information for the first circuit package. 2. The method of claim 1 , wherein: the request further includes a second circuit-based identifier value to check against the first circuit-based identifier value. 3. The method of claim 2 , further comprising: determining whether the first circuit package is counterfeit by determining whether the first association associates the second circuit-based identifier with the second mark value. 4. The method of claim 1 , further comprising: receiving user credentials; and checking the user credentials against user credentials associated with the first mark value in the centralized data store to determine whether the request is received from an authorized user. 5. The method of claim 1 , further comprising: receiving a request for a circuit package having a set of performance characteristics; identifying the first circuit package as having the set of performance characteristics based on first performance data stored in the centralized data store; identifying the first mark value as being associated with the first performance data in the centralized data store; and locating the first circuit package based on the first mark value. 6. The method of claim 1 , wherein: the first circuit-based identifier value is encoded within a series of fuses embedded within the first circuit package. 7. The method of claim 1 , wherein: the first circuit-based identifier value includes an indication of one or more of a wafer number identifying a wafer from which a die included within the first circuit package originated, a lot number identifying a lot that included the wafer, and a die coordinate geometrically identifying the die within the wafer. 8. The method of claim 1 , wherein: the first mark value is encoded within a 2-dimensional bar code on the first circuit package. 9. The method of claim 1 , wherein: the first mark value comprises an encrypted version of a value that identifies one or more of a location at which the first circuit package was assembled, a time at which the first package was assembled, and a serial number identifying the first circuit package. 10. A registration system for tracking information for circuit packages, the registration system comprising: a storage device; and a processor configured to: receive a first circuit-based identifier value encoded into a first circuit package of the circuit packages; receive a first mark value for a first mark on a surface of the first circuit package; associate the first circuit-based identifier value with the first mark value in the storage device to generate a first association; receive a request to obtain information for the first circuit package, the request including a second mark value; and compare the second mark value to the first mark value to obtain the information for the first circuit package. 11. The registration system of claim 10 , wherein: the request further includes a second circuit-based identifier value to check against the first circuit-based identifier value. 12. The registration system of claim 11 , wherein the processor is further configured to: determine whether the first circuit package is counterfeit by determining whether the first association associates the second circuit-based identifier with the second mark value. 13. The registration system of claim 10 , wherein the processor is further configured to: receive user credentials; and check the user credentials against user credentials associated with the first mark value in the storage device to determine whether the request is received from an authorized user. 14. The registration system of claim 10 , wherein the processor is further configured to: receive a request for a circuit package having a set of performance characteristics; identify the first circuit package as having the set of performance characteristics based on first performance data stored in the storage device; identify the first mark value as being associated with the first performance data in the storage device; and locate the first circuit package based on the first mark value. 15. The registration system of claim 10 , wherein: the first circuit-based identifier value is encoded within a series of fuses embedded within the first circuit package. 16. The registration system of claim 10 , wherein: the first circuit-based identifier value includes an indication of one or more of a wafer number identifying a wafer from which a die included within the first circuit package originated, a lot number identifying a lot that included the wafer, and a die coordinate geometrically identifying the die within the wafer. 17. The registration system of claim 10 , wherein: the first mark value is encoded within a 2-dimensional bar code on the first circuit package. 18. The registration system of claim 10 , wherein: the first mark value comprises an encrypted version of a value that identifies one or more of a location at which the first circuit package was assembled, a time at which the first package was assembled, and a serial number identifying the first circuit package. 19. A circuit package, comprising: an integrated circuit die; a first circuit-based identifier located within the integrated circuit die and encoding a first circuit-based identifier value; an encapsulation material encapsulating the integrated circuit die; and a first mark on a surface of the encapsulation material and encoding a first mark value, wherein a centralized data store stores an association between the first circuit-based identifier value and the first mark value. 20. The method of claim 19 , wherein: the first circuit-based identifier value is encoded within a series of fuses embedded within the first circuit package; the first circuit-based identifier value includes an indication of one or more of a wafer number identifying a wafer from which a die included within the first circuit package originated, a lot number identifying a lot that included the wafer, and a die coordinate geometrically identifying the die within the wafer; the first mark value is encoded within a 2-dimensional bar code on the first circuit package; and the first mark value comprises an encrypted version of a value that identifies one or more of a location at which the first circuit package was assembled, a time at which the first package was assembled, and a serial number identifying the first circuit package.

Assignees

Inventors

Classifications

  • G06Q10/087Primary

    Inventory or stock management, e.g. order filling, procurement or balancing against orders · CPC title

  • User authentication · CPC title

  • Product, service or business identity fraud · CPC title

  • Program or device authentication · CPC title

  • by inventory control or reporting using inventory tracking or counting · CPC title

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Frequently asked questions

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What does patent US10108925B1 cover?
Techniques for improved semiconductor inventory tracking, control, and testing are provided. The techniques include marking the semiconductor packaging with a 2-dimensional (“2D”) bar code that is stored in a data server. The data server associates the 2D barcode with performance data for the semiconductor, as well as with a “circuit-based identifier,” which comprises hard-wired electrical feat…
Who is the assignee on this patent?
Xilinx Inc
What technology area does this patent fall under?
Primary CPC classification G06Q10/087. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).