Sustainable Networking Plane De-Energization
US-2024414102-A1 · Dec 12, 2024 · US
US10108252B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10108252-B2 |
| Application number | US-201615060312-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 3, 2016 |
| Priority date | Mar 3, 2016 |
| Publication date | Oct 23, 2018 |
| Grant date | Oct 23, 2018 |
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A voltage regulator for delivering power to a processor subsystem within an information handling system is disclosed. The voltage regulator includes an interface to an embedded controller for receiving a linear load line impedance and an intelligent load line controller. The intelligent load line controller may enable linear load line control, determine that a nonlinear load line condition is satisfied, and enable nonlinear load line control based on the determination that the nonlinear load line condition is satisfied.
Opening claim text (preview).
What is claimed is: 1. A method of intelligent load line control comprising: enabling linear load line control by setting a linear load line impedance, wherein the linear load line impedance is based on a load factor of a processor subsystem; determining that a second range condition corresponding to a second range nonlinear load line impedance is satisfied, wherein the second range nonlinear load line impedance is greater than or equal to both the linear load line impedance and a first range nonlinear load line impedance; and enabling nonlinear load line control by setting the second range nonlinear load line impedance based on the determination that the second range condition is satisfied, wherein nonlinear load line control with the second range nonlinear load line impedance has a first piecewise linear response. 2. The method of claim 1 , wherein the second range condition is satisfied by: measuring a load current of the processor subsystem; computing a hysteresis load limit based on a load current threshold and a hysteresis factor; and determining that the measured load current is less than the hysteresis load limit. 3. The method of claim 1 , wherein the second range condition is satisfied by: receiving a requested power value; converting the requested power value into a power capability value; and determining that the power capability value is less than a previous power capability value. 4. The method of claim 1 , further comprising: determining that a third range condition corresponding to a third range nonlinear load line impedance is satisfied, wherein the third range nonlinear load line impedance is greater than or equal to the second range nonlinear load line impedance; and setting the third range nonlinear load line impedance based on the determination that the third range condition is satisfied, wherein nonlinear load line control with the third range nonlinear load line impedance has a second piecewise linear response different from the first piecewise linear response. 5. The method of claim 1 , further comprising: determining that an increased first range condition corresponding to the first range nonlinear load line impedance is satisfied, wherein the first range nonlinear load line impedance is less than the second range nonlinear load line impedance; and setting the first range nonlinear load line impedance based on the determination that the increased first range condition is satisfied, wherein nonlinear load line control with the first range nonlinear load line impedance has a third piecewise linear response different from the first piecewise linear response and the second piecewise linear response. 6. The method of claim 5 , wherein the increased first range condition is satisfied by: measuring a load current of the processor subsystem; computing a hysteresis load limit based on a load current threshold and a hysteresis factor; and determining that the measured load current is greater than the hysteresis load limit. 7. The method of claim 5 , wherein the increased first range condition is satisfied by: receiving a requested power value; converting the requested power value into a power capability value; and determining that the power capability value is greater than a previous power capability value. 8. An information handling system, comprising: a processor subsystem having access to a first memory; an embedded controller comprising a secondary processor having access to a second memory, the second memory storing instructions executable by the secondary processor to: read information from the processor subsystem to identify a load factor; determine a linear load line impedance based on the load factor; enable linear load line control by setting the linear load line impedance in a voltage regulator subsystem; determine that a second range condition corresponding to a second range nonlinear load line impedance is satisfied, wherein the second range nonlinear load line impedance is greater than or equal to both the linear load line impedance and a first range nonlinear load line impedance; and enable nonlinear load line control by setting the second range nonlinear load line impedance based on the determination that the second range condition is satisfied, wherein nonlinear load line control with the second range nonlinear load line impedance has a first piecewise linear response. 9. The information handling system of claim 8 , wherein the instructions to determine that the second range condition is satisfied include: receive a measured load current from the voltage regulator subsystem; compute a hysteresis load limit based on a load current threshold and a hysteresis factor; and determine that the measured load current is less than the hysteresis load limit. 10. The information handling system of claim 8 , wherein the instructions to determine that the second range condition is satisfied include: receive a requested power value; convert the requested power value into a power capability value; and determine that the power capability value is less than a previous power capability value. 11. The information handling system of claim 8 , further storing instructions to: determine that a third range condition corresponding to a third range nonlinear load line impedance is satisfied, wherein the third range nonlinear load line impedance is greater than or equal to the second range nonlinear load line impedance; and set the third range nonlinear load line impedance based on the determination that the third range condition is satisfied, wherein nonlinear load line control with the third range nonlinear load line impedance has a second piecewise linear response different from the first piecewise linear response. 12. The information handling system of claim 8 , further storing instructions to: determine that an increased first range condition corresponding to the first range nonlinear load line impedance is satisfied, wherein the first range nonlinear load line impedance is less than the second range nonlinear load line impedance; and set the first range nonlinear load line impedance based on the determination that the first range condition is satisfied, wherein nonlinear load line control with the first range nonlinear load line impedance has a third piecewise linear response different from the first piecewise linear response and the second piecewise linear response. 13. The information handling system of claim 12 , wherein the instructions to determine that the increased first range condition is satisfied include: receive a measured load current from the voltage regulator subsystem; compute a hysteresis load limit based on a load current threshold and a hysteresis factor; and determine that the measured load current is greater than the hysteresis load limit. 14. The information handling system of claim 12 , wherein the instructions to determine that the increased first range condition is satisfied include: receive a requested power value; convert the requested power value into a power capability value; and determine that the relative power capability value is greater than a previous power capability value. 15. A voltage regulator for delivering power to a processor subsystem within an information handling system, comprising: an interface to an embedded controller for receiving a linear load line impedance based on a load factor determined by information read from the processor subsystem; an intelligent load line controller including circuitry to: enable linear load line control by setting the linear load line impedance and to determine
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