Methods and apparatus for peak-voltage measurement of AC signals

US10107841B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10107841-B2
Application numberUS-201615172403-A
CountryUS
Kind codeB2
Filing dateJun 3, 2016
Priority dateJul 24, 2015
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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Abstract

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In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

First claim

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What is claimed is: 1. An apparatus, comprising: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal, the clamping circuit configured to output a clamped voltage signal that is constrained between a positive voltage magnitude and a negative voltage magnitude; a first comparator coupled to the clamped voltage signal, and configured to output a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold reference voltage; a second comparator coupled to the clamped voltage signal and configured to output a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold reference voltage; a timer circuit coupled to the first compare signal and coupled to the second compare signal and coupled to a clock signal, and configured to output a time duration output signal corresponding to a time interval between the first and second compare signals; and a logic circuit coupled to the time duration output signal and configured to determine a slew rate of the alternative current voltage signal responsive to the time duration output; wherein the logic circuit is configured to perform the calculation: Slew Rate=2*Vth/delta t; where Vth equals the positive threshold voltage, and delta t is equal to a ratio of the time duration output signal divided by the frequency of the clocked signal. 2. The apparatus of claim 1 , wherein the logic circuit is further configured to perform the calculation: Vpeak=Slew Rate*T/4; where T is the period of the alternating current voltage signal. 3. The apparatus of claim 1 , wherein the clamping circuit further includes one or more diodes. 4. The apparatus of claim 1 , wherein the clamping circuit further includes a first diode that is forward biased with respect to a positive voltage and a second diode arranged in parallel to the first diode that is forward biased with respect to a negative voltage, relative to a ground terminal. 5. The apparatus of claim 1 , wherein the first and second comparators each further include a hysteretic comparator. 6. The apparatus of claim 1 , wherein the logic circuit is arranged to output a signal indicating the voltage Vpeak exceeds a predetermined threshold. 7. The apparatus of claim 1 , wherein the predetermined threshold is greater than 100 Volts. 8. The apparatus of claim 1 , further comprising an impedance series coupled between the input terminal and the clamping circuit. 9. The apparatus of claim 8 , wherein the impedance further includes a resistor. 10. The apparatus of claim 8 , and further comprising a second impedance coupled between the output of the first impedance and a ground terminal. 11. The apparatus of claim 10 , wherein the logic circuit is further configured to perform the calculation: V peak=(1+value of the first impedance/value of the second impedance)*Slew Rate* T/ 4; where T is the period of the alternating current voltage signal. 12. The apparatus of claim 1 , wherein the alternating current voltage signal has a peak voltage that exceeds a maximum input voltage. 13. The apparatus of claim 12 , wherein the alternating current voltage signal has a peak voltage greater than 40 Volts. 14. A method, comprising: receiving an alternating current voltage signal; forming a clamped voltage signal from the alternating current voltage signal, wherein the clamped voltage signal is constrained to a predetermined maximum positive voltage and a predetermined negative voltage that are less than a peak voltage of the alternating current voltage signal; comparing the clamped voltage signal to a positive reference threshold voltage, and outputting a set signal when the clamped voltage signal exceeds the positive reference threshold voltage; comparing the clamped voltage signal to a negative threshold voltage, and outputting a reset signal when the clamped voltage signal exceeds the negative reference threshold voltage; forming a timer duration signal indicating a time between the set and reset signals; and using the timer duration signal, determining a slew rate in the alternating current voltage signal; wherein determining a slew rate in the alternating current voltage signal includes performing the calculation of: Slew Rate of the alternating current voltage signal=2*Vth/delta t; where Vth equals the positive threshold voltage, and delta t is equal to a ratio of the output of the timer circuit divided by the frequency of the clocked signal. 15. The method of claim 14 , wherein determining a peak voltage in the alternating current voltage signal includes performing the calculation of: Vpeak=Slew Rate*T/4; where T is the period of the alternating current voltage signal. 16. The method of claim 15 , and further comprising: outputting a signal indicating when the calculated peak voltage is greater than a predetermined threshold. 17. An integrated circuit for monitoring an alternating current voltage signal, comprising: an input terminal coupled to receive the alternating current voltage signal; a clamping circuit coupled to the input terminal and having a clamped output voltage, the clamping circuit configured to limit the output voltage signal between a predetermined positive voltage magnitude and a predetermined negative voltage magnitude; a first comparator coupled to the clamped output voltage and coupled to a positive threshold reference voltage, and configured to output a set signal responsive to a positive magnitude of the output voltage signal exceeding the positive threshold reference voltage; a second comparator coupled to the clamped output voltage and coupled to a negative threshold reference voltage, and configured to output a reset signal responsive to a negative magnitude of the output voltage signal that exceeding the negative threshold reference voltage; a timer circuit coupled to the set signal and coupled to the reset signal and configured to sample the set signal and the reset signal responsive to a clock signal, and to output a time duration signal corresponding to the time between set and reset signals; and a logic circuit coupled to the timer circuit and configured to determine a peak voltage in the alternating current voltage signal responsive to the time duration signal; wherein the logic circuit is configured to perform the calculations of: Slew Rate of the alternating current voltage signal=2*Vth/delta t; where Vth is the positive threshold voltage, and delta t is equal to a ratio of the output of the timer circuit divided by the frequency of the clocked signal, and Vpeak=Slew Rate*T/4; where T is the period of the alternating current voltage signal.

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Classifications

  • G01R19/04Primary

    Measuring peak values {or amplitude or envelope} of AC or of pulses · CPC title

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What does patent US10107841B2 cover?
In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a p…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification G01R19/04. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).