Differential circuits with constant GM bias

Patent metadata

Field	Value
Publication number	US-10103698-B2
Application number	US-201715633521-A
Country	US
Kind code	B2
Filing date	Jun 26, 2017
Priority date	May 20, 2016
Publication date	Oct 16, 2018
Grant date	Oct 16, 2018

Abstract

The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well.

First claim

What is claimed is:

1. A different amplifier device comprising:
an output resistor;
a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to a first voltage input;
a second switch comprising a second gate and a second drain and a second source, the second gate being coupled to a second voltage input, the second drain being coupled to the output resistor;
a feedback circuit comprising a third switch and a fourth switch, the third switch and the fourth switch being coupled to a voltage supply;
a first common resistor and a second common resistor coupled to the feedback circuit;
a bias generator circuit being coupled to the feedback circuit via the first common resistor and the second common resistor, the bias generator circuit being configured to provide a bias reference voltage to the feedback circuit; and
a current source comprising a fifth switch and a first amplifier, the current source being coupled to the first switch.

2. The device of claim 1 wherein the first switch and the second switches are NMOS switches.

3. The device of claim 1 wherein the first amplifier is configured to adjust the fifth switch until a voltage drop across the output resistor is equal to a different between the first voltage input and the second voltage input.

4. The device of claim 1 wherein the third switch and the fourth switch are PMOS switches.

5. The device of claim 1 wherein feedback circuit further comprising a second amplifier, the output of the second amplifier being coupled to the gates of the third switch and the fourth switch.

6. The device of claim 1 wherein the bias generator circuit comprises a sixth switch and a seventh switch.

7. The device of claim 6 wherein the sixth switch and the seventh switch are PMOS switches.

8. The device of claim 1 further comprising a voltage supply coupled to the feedback circuit and the bias generator.

9. The device of claim 1 wherein the first switch is characterized by a substantially constant transconductance value.

10. The device of claim 1 wherein the feedback circuit comprises a pair of resistors respectively coupled to the third switch and the fourth switch.

11. The device of claim 10 wherein input terminals of the first amplifier is coupled to the first drain and the first voltage.

12. The device of claim 1 wherein a gate of the fifth switch is coupled to a slave circuit.

13. The device of claim 12 wherein a voltage of the first voltage input is close to a common mode voltage of the slave circuit.

14. The device of claim 1 wherein the feedback circuit comprises a pair of common mode resistors.

15. A different amplifier device comprising:
an output resistor;
a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to a first voltage input;
a second switch comprising a second gate and a second drain and a second source, the second gate being coupled to a second voltage input, the second drain being coupled to the output resistor;
a voltage supply;
a feedback circuit comprising a third switch and a fourth switch and a first amplifier, the third switch and the fourth switch being coupled to the voltage supply;
a first common resistor and a second common resistor coupled to the feedback circuit;
a bias generator circuit configured to provide a bias reference voltage to the feedback circuit; and
a current source coupled to the second drain and the first voltage input.

16. The device of claim 15 wherein the first amplifier comprises an NMOS based output stage.

17. The device of claim 15 wherein the current source comprises a second amplifier.

18. A different amplifier device comprising:
a first switch comprising an NMOS transistor having a first gate and a first drain and a first source, the first gate being coupled to a first voltage input;
a second switch comprising an NMOS transistor having a second gate and a second drain and a second source, the second gate being coupled to a second voltage input;
a feedback circuit comprising a third switch and a fourth switch and a first amplifier;
a first common resistor and a second common resistor coupled to the feedback circuit;
a bias generator circuit being coupled to the voltage supply and the feedback circuit, the bias generator circuit being configured to provide a bias reference voltage to the feedback circuit; and
a current source comprising a fifth switch and a second amplifier, inputs terminals of the second amplifier being coupled to the second drain and the first voltage input.

19. The device of claim 18 wherein the output terminal of the second amplifier being coupled to a gate of the third switch, the output terminal of the second amplifier being coupled to a slave circuit.

20. The device of claim 18 wherein the bias generator comprises a bias transistor and a bias resistor, the bias resistor being coupled to a voltage supply.

Assignees

• Inphi Corp

Inventors

• Nagulapalli Rajasekhar
• Forey Simon
• Mishra Parmanand

Classifications

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03F2203/45244

  the differential amplifier contains one or more explicit bias circuits, e.g. to bias the tail current sources, to bias the load transistors · CPC title

• H03F1/34

  Negative-feedback-circuit arrangements with or without positive feedback (H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence {; for rejection of common mode signals H03F3/45479}) · CPC title

• H03F2203/45112

  the biasing of the differential amplifier being controlled from the input or the output signal · CPC title

• H03F3/45183 Primary

  Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title