Backside ground plane for integrated circuit

US10103135B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10103135-B2
Application numberUS-201615275068-A
CountryUS
Kind codeB2
Filing dateSep 23, 2016
Priority dateSep 23, 2016
Publication dateOct 16, 2018
Grant dateOct 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit (IC) device includes a die having an integrated passive device (IPD) layer. The integrated circuit device also includes a substrate supporting the die, a molding compound surrounding the die. The integrated circuit device further includes a backside conductive layer on a surface of the die that is distal from the IPD layer. The integrated circuit device also includes vias coupling the backside conductive layer to a ground plane through the molding compound.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit (IC) device, comprising: a die including an integrated passive device (IPD) layer; a substrate supporting the die; a molding compound surrounding the die; a backside conductive layer on a surface of the die that is distal from the IPD layer; and a plurality of vias coupling the backside conductive layer to a ground plane through the molding compound, in which the ground plane is on a backside of the molding compound. 2. The IC device of claim 1 , in which the IPD layer comprises inductors and capacitors. 3. The IC device of claim 1 , in which the ground plane comprises a shielding layer surrounding a portion of the molding compound and the substrate. 4. The IC device of claim 3 , in which the shielding layer is arranged to cover sidewalls of the substrate. 5. The IC device of claim 1 , in which the ground plane is distal from the IPD layer. 6. The IC device of claim 1 , further comprising solder balls on a front side of the die for electrically coupling the substrate to the die. 7. The IC device of claim 1 , integrated into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer. 8. A method of fabricating an integrated circuit (IC) device, comprising: plating a backside conductive layer on a backside of a die including an integrated passive device (IPD) layer; attaching a front side of the die to a packaging substrate; spreading a molding material on the packaging substrate to surround the die with a molding compound; exposing the backside conductive layer on the die through the molding compound; and depositing a conductive material on the molding compound, the conductive material contacting the backside conductive layer on the die and providing a ground plane for the IPD layer, in which the ground plane is on a backside of the molding compound. 9. The method of claim 8 , in which the exposing comprises drilling through the molding material. 10. The method of claim 8 , in which the depositing comprises conformally coating the molding compound. 11. The method of claim 8 , in which the conductive material is arranged to cover sidewalls of the packaging substrate. 12. The method of claim 8 , in which the IPD layer comprises inductors and capacitors. 13. The method of claim 8 , in which the ground plane comprises a shielding layer surrounding a portion of the die and the packaging substrate. 14. The method of claim 8 , further comprising integrating the IC device into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer. 15. An integrated circuit (IC) device, comprising: a die including an integrated passive device (IPD) layer; a substrate supporting the die; a molding compound surrounding the die; a backside conductive layer on a surface of the die that is distal from the IPD layer; and means for coupling the backside conductive layer to a ground plane, in which the ground plane is on a backside of the molding compound. 16. The IC device of claim 15 , integrated into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer. 17. A radio frequency (RF) front end module, comprising: a filter, comprising a die including an integrated passive device (IPD) layer, a substrate supporting the die, a molding compound surrounding the die, a backside conductive layer on a surface of the die that is distal from the IPD layer, and a plurality of vias coupling the backside conductive layer to a ground plane, in which the ground plane is on a backside of the molding compound; a diplexer coupled to the filter; and an antenna coupled to an output of the diplexer. 18. The RF front end module of claim 17 , in which the IPD layer comprises inductors and capacitors. 19. The RF front end module of claim 17 , incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

Assignees

Inventors

Classifications

  • materials for magnetic shielding, e.g. ferromagnetic materials · CPC title

  • the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

  • characterised by their shape or disposition · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • by a substrate and the encapsulations · CPC title

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What does patent US10103135B2 cover?
An integrated circuit (IC) device includes a die having an integrated passive device (IPD) layer. The integrated circuit device also includes a substrate supporting the die, a molding compound surrounding the die. The integrated circuit device further includes a backside conductive layer on a surface of the die that is distal from the IPD layer. The integrated circuit device also includes vias …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).