Independent vector element order and memory byte order controls

Patent metadata

Field	Value
Publication number	US-10101997-B2
Application number	US-201615069683-A
Country	US
Kind code	B2
Filing date	Mar 14, 2016
Priority date	Mar 14, 2016
Publication date	Oct 16, 2018
Grant date	Oct 16, 2018

Abstract

Techniques are disclosed for managing vector element ordering. One technique includes receiving an assembler command from a source file, wherein the assembler command indicates a vector element order for one or more subsequent machine instructions in the source file. The technique includes determining whether the vector element order comprises a big-endian (BE) order or a little-endian (LE) order. If the vector element order comprises a BE order, the technique includes assembling one or more subsequent machine instructions and placing the machine instructions in a BE section of a file. If the vector element order comprises a LE order, the technique includes assembling one or more subsequent machine instructions and placing the machine instructions in a LE section of the file.

First claim

What is claimed is:

1. A computer implemented method for managing vector element ordering, comprising;
receiving an assembler command from a source file, wherein the assembler command indicates a vector element order for one or more subsequent machine instructions in the source file, wherein the vector element order is set by the assembler command, and wherein one or more control bits are read to determine the vector element order and a vector element numbering;
determining whether the vector element order and the vector element numbering indicate a big-endian (BE) order or a little-endian (LE) order;
if the vector element order and the vector element numbering indicate a BE order, assembling one or more subsequent machine instructions and placing the machine instructions in a BE section of a file; and
if the vector element order and the vector element numbering indicate a LE order, assembling one or more subsequent machine instructions and placing the machine instructions in a LE section of the file.

2. The computer implemented method of claim 1 , further comprising, after placing the machine instructions in the file, receiving a second assembler command from the source file, wherein the second assembler command indicates a vector element order for one or more subsequent machine instructions in the source file;
determining whether the vector element order comprises a BE order or a LE order;
if the vector element order comprises a BE order, assembling one or more subsequent machine instructions and placing the machine instructions in the BE section of the file; and
if the vector element order comprises a LE order, assembling one or more subsequent machine instructions and placing the machine instructions in the LE section of the file.

3. The computer implemented method of claim 1 , further comprising:
linking one or more BE sections of the file together, and linking one or more LE sections of the file together.

4. The computer implemented method of claim 3 , further comprising:
loading the linked BE sections into one or more first memory pages, wherein the one or more first memory pages utilize a BE vector element ordering; and
loading the linked LE sections into one or more second memory pages, wherein the one or more second memory pages utilize a LE vector element ordering.

5. The computer implemented method of claim 4 , wherein a page table entry associated with each memory page determines the vector element ordering for that respective memory page.

6. The computer implemented method of claim 4 , wherein a first page table entry associated with each memory page determines the vector element ordering for that respective memory page, and a second page table entry associated with each memory page determines a vector element numbering for that respective memory page.

7. The computer implemented method of claim 4 , wherein one or more bits in a master status register determines the vector element ordering for one or more of the first memory pages or the second memory pages.

8. A computer program product for managing vector element ordering, the computer program product comprising a non-transitory computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code executable by a processor to cause the processor to:
receive an assembler command from a source file, wherein the assembler command indicates a vector element order for one or more subsequent machine instructions in the source file, wherein the vector element order is set by the assembler command, and wherein one or more control bits are read to determine the vector element order and a vector element numbering;
determine whether the vector element order and the vector element numbering indicate a big-endian (BE) order or a little-endian (LE) order;
if the vector element order and the vector element numbering indicate a BE order, assemble one or more subsequent machine instructions and place the machine instructions in a BE section of a file; and
if the vector element order and the vector element numbering indicate a LE order, assemble one or more subsequent machine instructions and place the machine instructions in a LE section of the file.

9. The computer program product of claim 8 , further comprising, after placing the machine instructions in the file, receive a second assembler command from the source file, wherein the second assembler command indicates a vector element order for one or more subsequent machine instructions in the source file;
determine whether the vector element order comprises a BE order or a LE order;
if the vector element order comprises a BE order, assemble one or more subsequent machine instructions and place the machine instructions in the BE section of the file; and
if the vector element order comprises a LE order, assemble one or more subsequent machine instructions and place the machine instructions in the LE section of the file.

10. The computer program product of claim 8 , further comprising computer-readable program code executable by a processor to cause the processor to:
link one or more BE sections of the file together, and link one or more LE sections of the file together.

11. The computer program product of claim 10 , further comprising computer-readable program code executable by a processor to cause the processor to:
load the linked BE sections into one or more first memory pages, wherein the one or more first memory pages utilize a BE vector element ordering; and
load the linked LE sections into one or more second memory pages, wherein the one or more second memory pages utilize a LE vector element ordering.

12. The computer program product of claim 11 , wherein a page table entry associated with each memory page determines the vector element ordering for that respective memory page.

13. The computer program product of claim 11 , wherein a first page table entry associated with each memory page determines the vector element ordering for that respective memory page, and a second page table entry associated with each memory page determines a vector element numbering for that respective memory page.

14. The computer program product of claim 11 , wherein one or more bits in a master status register determines the vector element ordering for one or more of the first memory pages or the second memory pages.

15. A system, comprising: a processor; and a memory storing a program, which, when executed on the processor, performs an operation for managing vector element ordering, the operation comprising:
receiving an assembler command from a source file, wherein the assembler command indicates a vector element order for one or more subsequent machine instructions in the source file, wherein the vector element order is set by the assembler command, and wherein one or more control bits are read to determine the vector element order and a vector element numbering;
determining whether the vector element order and the vector element numbering indicate a big-endian (BE) order or a little-endian (LE) order;
if the vector element order and the vector element numbering indicate a LE order, assembling one or more subsequent machine instructions and placing the machine instructions in a BE section of a file; and
if the vector element order and the vector element numbering indicate a LE order, assembling one or more subsequent machine instructions and placing the machine instructions in a LE section of the file.

16. The system of claim 15 , further comprising, after placing the machine instructions in the file, receiving a second assembler

Assignees

• IBM

Inventors

• Gschwind Michael Karl
• Schmidt William J

Classifications

• G06F9/30036 Primary

  Instructions to perform operations on packed data, e.g. vector, tile or matrix operations · CPC title

• G06F9/3005

  to perform operations for flow control · CPC title

• G06F9/30043

  LOAD or STORE instructions; Clear instruction · CPC title

• G06F8/44 Primary

  Encoding · CPC title

• G06F9/30189

  according to execution mode, e.g. mode flag · CPC title