Display substrate and manufacturing method thereof, display device

US10101621B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10101621-B2
Application numberUS-201615268880-A
CountryUS
Kind codeB2
Filing dateSep 19, 2016
Priority dateOct 12, 2015
Publication dateOct 16, 2018
Grant dateOct 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate and a display device are provided. The display substrate includes: plural gate lines each having at least one end provided with plural first electrostatic discharge (ESD) units configured to discharge static electricity in the gate lines. The plural first ESD units have curvatures different from each other. By discharging the static electricity through the plural ESD units, in case one of the ESD units is broken down by electrostatic current, the other ones can continue working.

First claim

Opening claim text (preview).

What is claimed is: 1. A display substrate, comprising: plural gate lines each having at least one end provided with plural first electrostatic discharge (ESD) units configured to discharge static electricity in the gate lines, wherein the plural first ESD units have curvatures different from each other. 2. The display substrate according to claim 1 , further comprising: plural first electrostatic induction (ESI) units corresponding to the first ESD units respectively, being configured to receive the static electricity discharged by the first ESD units. 3. The display substrate according to claim 1 , further comprising: at least one first common electrode line parallel to data lines; plural first thin film transistors (TFTs) each corresponding to one of the gate lines, wherein each of the first TFTs has a drain connected to the first common electrode line, and a source and a gate both connected to the corresponding gate line. 4. The display substrate according to claim 1 , wherein the plural first ESD units are disposed at two sides of each end of each of the gate lines along an axial line of the gate line, respectively. 5. The display substrate according to claim 1 , wherein the curvatures of the first ESD units disposed at one end of each of the gate ones are progressively increased along a direction from a middle point of the gate line to the end of the gate line. 6. The display substrate according to claim 1 further comprising: plural data lines each having at least one end provided with plural second ESD units configured to discharge static electricity in the data lines, wherein the plural second ESD units have curvatures different from each other. 7. The display substrate according to claim 6 , further comprising: plural second ESI units corresponding to the plural second ESD units respectively, being configured to receive the static electricity discharged by the second ESD units. 8. The display substrate according to claim 6 , further comprising: at least one second common electrode line parallel to the gate lines; plural second TFTs each corresponding to one of the data lines, wherein each of the second TFTs has a drain connected to the second common electrode line, and a source and a gate both connected to the corresponding data line. 9. The display substrate according to claim 6 , wherein the plural second ESD units are disposed at two sides of each end of each of the data lines along an axial line of the data line, respectively. 10. The display substrate according to claim 6 , wherein the curvatures of the plural second ESD units disposed at one end of each of the data lines are progressively increased along a direction from a middle point of the data line to the end of the data line. 11. A display device, comprising a display substrate, wherein the display substrate comprises: plural gate lines each having at least one end provided with plural first electrostatic discharge (ESD) units configured to discharge static electricity in the gate lines, wherein the plural first ESD units have curvatures different from each other. 12. A manufacturing method of the display substrate according to claim 1 , comprising: forming the plural gate lines on a substrate, simultaneously forming the plural first electrostatic discharge (ESD) units at at least one end of each of the gate lines to discharge static electricity in the gate lines; wherein the plural first ESD units have curvatures different from each other. 13. The manufacturing method according to claim 12 , comprising: forming plural data lines on a gate insulating layer, meanwhile forming plural second ESD units at at least one end of each of the data lines to discharge static electricity in the data lines; wherein the plural second ESD units have curvatures different from each other. 14. The manufacturing method according to claim 12 , further comprising: at the time of forming the gate lines, forming plural first electrostatic induction (ESI) units on the substrate to be corresponding to the first ESD units respectively, to receive the static electricity discharged by the first ESD units. 15. The manufacturing method according to claim 13 , further comprising: at the time of forming the data lines, forming plural second ESI units on the gate insulating layer to be corresponding to the second ESD units respectively, to receive the static electricity discharged by the second ESD units. 16. The display substrate according to claim 2 , further comprising: at least one first common electrode line parallel to data lines; plural first thin film transistors (TFTs) each corresponding to one of the gate lines, wherein each of the first TFTs has a drain connected to the first common electrode line, and a source and a gate both connected to the corresponding gate line. 17. The display substrate according to claim 2 , wherein the plural first ESD units are disposed at two sides of each end of each of the gate lines along an axial line of the gate line, respectively. 18. The display substrate according to claim 2 , further comprising: plural data lines each having at least one end provided with plural second ESD units configured to discharge static electricity in the data lines, wherein the plural second ESD units have curvatures different from each other. 19. The display substrate according to claim 18 , wherein the plural first ESD units are disposed at two sides of each end of each of the gate lines along an axial line of the gate line, respectively.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Arrangements to prevent high voltage or static electricity failures · CPC title

  • in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

  • Electricity · mapped topic

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What does patent US10101621B2 cover?
A display substrate and a display device are provided. The display substrate includes: plural gate lines each having at least one end provided with plural first electrostatic discharge (ESD) units configured to discharge static electricity in the gate lines. The plural first ESD units have curvatures different from each other. By discharging the static electricity through the plural ESD units, …
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Beijing Boe Display Tech Co, Beijing Boe Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/136204. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).