Trimming circuit for a sensor and trimming method

US10101358B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10101358-B2
Application numberUS-201314899149-A
CountryUS
Kind codeB2
Filing dateJul 3, 2013
Priority dateJul 3, 2013
Publication dateOct 16, 2018
Grant dateOct 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.

First claim

Opening claim text (preview).

The invention claimed is: 1. A trimming circuit for a sensor, the trimming circuit comprising: a comparator; a voltage reference generator comprising a feedback resistance divider circuit having at least one tap, wherein the comparator is arranged to compare an output of the sensor with a reference voltage wherein the reference voltage is supplied from a tap of the feedback resistance divider circuit; an adjustment circuit configured to adjust an output of the sensor based on an output of the comparator, wherein the comparator is arranged to compare an adjusted output of the sensor with a reference voltage, and the reference voltage is supplied from a tap of the feedback resistance divider circuit; and a controller arranged to set a trim code for use by the adjustment circuit. 2. The trimming circuit of claim 1 wherein the adjustment circuit comprises a gain circuit arranged to apply a gain value associated with a trim code to an output of the sensor. 3. The trimming circuit of claim 1 further comprising a controller arranged to select a tap for setting a reference voltage for use by the comparator. 4. The trimming circuit of claim 1 further comprising a controller arranged to compute an interpolated gain trim code from gain trim codes determined at positive and negative acceleration values applied to the sensor. 5. The trimming circuit of claim 1 wherein the voltage reference generator is arranged to generate a full scale reference voltage for use by an analog to digital converter, and the trimming circuit is arranged to supply an output from the sensor to the analog to digital converter. 6. The trimming circuit of claim 1 , including the sensor, being implemented in an integrated circuit device. 7. A trimming circuit for a sensor, the trimming circuit comprising: a comparator; a voltage reference generator comprising a feedback resistance divider circuit having at least one tap, wherein the comparator is arranged to compare an output of the sensor with a reference voltage wherein the reference voltage is supplied from a tap of the feedback resistance divider circuit; an adjustment circuit configured to adjust an output of the sensor based on an output of the comparator, wherein the comparator is arranged to compare an adjusted output of the sensor with a reference voltage, the reference voltage is supplied from a tap of the feedback resistance divider circuit, and wherein the adjustment circuit comprises an offset circuit arranged to apply an offset value associated with a trim code to an output of the sensor. 8. A method for trimming a sensor, the method comprising: comparing an output of the sensor with a reference voltage, wherein the reference voltage is supplied from a tap of a feedback resistance divider circuit of a voltage reference generator; adjusting an output of the sensor based on the comparison; adjusting an output of the sensor by an amount according to a trim code to produce an adjusted sensor output; and comparing the adjusted sensor output with the reference voltage supplied from the tap of the feedback resistance divider circuit of the voltage reference generator. 9. The method of claim 8 further comprising setting a wait time between applying the adjusted sensor output to an input of a comparator and making a comparison in the comparator with the reference voltage. 10. The method of claim 8 further comprising making an adjustable number of comparisons between the adjusted sensor output and the reference voltage. 11. The method of claim 8 comprising recording a determined trim code which, when applied to an adjustment circuit, produces a desired comparator result. 12. The method of claim 11 comprising determining an interpolated gain trim code from gain trim codes determined at positive and negative acceleration values applied to the sensor.

Assignees

Inventors

Classifications

  • on measuring arrangements themselves · CPC title

  • G01P21/00Primary

    Testing or calibrating of apparatus or devices covered by the preceding groups · CPC title

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Frequently asked questions

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What does patent US10101358B2 cover?
An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by u…
Who is the assignee on this patent?
Cozac Emil, Enjalbert Jerome, Ouaddah Jalal, and 1 more
What technology area does this patent fall under?
Primary CPC classification G01P21/00. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).