Edge seal for lower electrode assembly

US10090211B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10090211-B2
Application numberUS-201314141079-A
CountryUS
Kind codeB2
Filing dateDec 26, 2013
Priority dateDec 26, 2013
Publication dateOct 2, 2018
Grant dateOct 2, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate. The mounting groove includes an inner wall, an opening of the mounting groove faces radially outward relative to the inner wall, and the mounting groove includes a step extending downward from the upper plate on an upper wall of the groove or extending upward from the base plate on a lower wall of the groove. An edge seal including a compressible ring is mounted in the groove such that the compressible ring is compressed between the upper plate and the base plate to cause an outer surface of the compressible ring to be biased radially outward relative to the inner wall toward the step.

First claim

Opening claim text (preview).

What is claimed is: 1. A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber comprising: a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate, wherein the mounting groove includes an inner wall defining an inner radius of the mounting groove, wherein an opening of the mounting groove faces radially outward relative to the inner wall, and wherein the mounting groove includes at least one step extending downward from the upper plate on an upper wall of the groove or extending upward from the base plate on a lower wall of the groove; and an edge seal comprising a compressible ring mounted in the groove such that the compressible ring is axially compressed between the upper plate and the base plate to cause an outer surface of the compressible ring to be biased radially outward relative to the inner wall toward the at least one step, wherein the at least one step is located radially outward of the compressible ring relative to the inner wall such that (i) an outer surface of the compressible ring engages the at least one step to retain the compressible ring within the groove when (a) compressed between the upper plate and the base plate and (b) the plasma processing chamber is pumped down, and (ii) the compressible ring does not engage the inner wall of the groove when compressed between the upper plate and the base plate. 2. The electrode assembly of claim 1 , further comprising at least one gas passage in fluid communication with an annular space between the compressible ring and an inner wall of the groove, wherein the at least gas one passage extends through the base plate and includes multiple outlets in fluid communication with the annular space. 3. The electrode assembly of claim 2 , further comprising: a gas source operable to supply inert gas to the gas passage, wherein the gas source is configured to maintain the inert gas at a pressure of 100 mTorr to 100 Torr in the annular space. 4. The electrode assembly of claim 3 , further comprising: a pressure monitor which is operable to monitor pressure in the annular space wherein the pressure monitor is configured to issue an alarm if gas flow to the annular space exceeds a threshold flow rate indicating inadequate sealing by the compressible ring. 5. The electrode assembly of claim 1 , wherein the compressible ring comprises a silicone core and a fluoropolymer coating. 6. The electrode assembly of claim 1 , wherein the compressible ring is an O-ring or an elastomer band having a non-circular cross-section. 7. The electrode assembly of claim 6 , further comprising: a backing seal located between the O-ring and an inner wall of the groove, the backing seal having a vertical inner surface, horizontal upper and lower surfaces and a concave outer surface fitted against the O-ring. 8. The electrode assembly of claim 1 , wherein the mounting groove is rectangular in cross-section with a height extending between the base plate and the upper plate of less than 0.15 inch. 9. The electrode assembly of claim 1 , wherein the upper plate comprises a ceramic material having at least one electrostatic clamping electrode embedded therein. 10. The electrode assembly of claim 1 , wherein the base plate includes fluid channels therein through which coolant may be circulated so as to maintain the base plate at a constant temperature. 11. The electrode assembly of claim 1 , wherein the lower electrode assembly further comprises: a heater plate comprising a metal or ceramic plate having one or more spatially distributed heaters and the bond layer comprises a first adhesive layer attaching the base plate to the heater plate and a second adhesive layer attaching the heater plate to the upper plate, the inner wall of the mounting groove formed by outer surfaces of the heater plate and the adhesive layers and upper and lower walls of the groove formed by opposed surfaces of the upper plate and the base plate. 12. The electrode assembly of claim 1 , wherein surfaces of the groove are polished to a mirror-like surface roughness Ra of 32 microinch or less. 13. The electrode assembly of claim 1 , wherein the at least one step has a height of at least about 0.002 inch. 14. The electrode assembly of claim 1 , wherein the compressible ring has a metallic content less than 5000 parts per billion for each and every metal element comprised therein. 15. A plasma etch chamber wherein the lower electrode assembly of claim 1 is mounted in an interior thereof and the upper plate of the lower electrode assembly includes an electrostatic chuck (ESC). 16. The electrode assembly of claim 1 , wherein the at least one step is a tapered step. 17. An O-ring adapted to be mounted in the groove of the edge seal in the lower electrode assembly of claim 1 . 18. A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber comprising: a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate, wherein the mounting groove includes an inner wall defining an inner radius of the mounting groove, wherein an opening of the mounting groove faces radially outward relative to the inner wall, and wherein the mounting groove includes a first step extending downward from the upper plate on an upper wall of the groove and a second step extending upward from the base plate on a lower wall of the groove; and an edge seal comprising a compressible ring mounted in the groove such that the compressible ring is axially compressed between the upper plate and the base plate to cause an outer surface of the compressible ring to be biased radially outward relative to the inner wall toward the first and second steps, wherein the first and second steps are located radially outward of the compressible ring relative to the inner wall such that (i) an outer surface of the compressible ring engages the first and second steps to retain the compressible ring within the groove when (a) compressed between the upper plate and the base plate and (b) the plasma processing chamber is pumped down, and (ii) the compressible ring does not engage the inner wall of the groove when compressed between the upper plate and the base plate. 19. The electrode assembly of claim 18 , further comprising at least one gas passage in fluid communication with an annular space between the compressible ring and an inner wall of the groove, wherein the at least gas one passage extends through the base plate and includes multiple outlets in fluid communication with the annular space.

Assignees

Inventors

Classifications

  • Temperature · CPC title

  • Sealing means, e.g. sealing between different parts of the vessel · CPC title

  • Gas supply means · CPC title

  • Radio frequency generated discharge (H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence) · CPC title

  • Electrodes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10090211B2 cover?
A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate. The mounting groove includes an inner wall, an opening of the mounting groove faces radially outward…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H01J37/32082. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 02 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).