Configurable processor interrupts for allowing an application to independently handle interrupts

Patent metadata

Field	Value
Publication number	US-10083134-B2
Application number	US-201514953309-A
Country	US
Kind code	B2
Filing date	Nov 28, 2015
Priority date	Nov 28, 2015
Publication date	Sep 25, 2018
Grant date	Sep 25, 2018

Abstract

Embodiments relate to configurable processor interrupts. An aspect includes sending, by an application to supervisor software in a computer system, a request, the request including a plurality of exception types to be handled by the application. Another aspect includes determining, by the supervisor software, a subset of the plurality of exception types for which to approve handling by the application. Yet another aspect includes sending a response from the supervisor software to the application notifying the application of the subset of exception types.

First claim

What is claimed is:

1. A computer implemented method for configurable interrupts for a processor, the method comprising:
sending, by an application to supervisor software in a computer system, a request, the request including a plurality of exception types to be handled by the application;
determining, by the supervisor software, a subset of the plurality of exception types for which to approve handling by the application;
sending a response from the supervisor software to the application notifying the application of the subset of exception types;
based on an exception occurring in a processor of the computer system during execution of the application, determining whether a type of the exception is one of the subset of exception types; and
based on determining that the type of the exception is one of the subset of exception types, sending a lightweight interrupt corresponding to the exception to an exception handler in the application.

2. The method of claim 1 , further comprising, based on determining that the type of the exception is not one of the subset of exception types, interrupting execution of the application and handling the exception by the supervisor software.

3. The method of claim 1 , further comprising setting, by the supervisor software, a control register of the processor to indicate the subset of the plurality of exception types.

4. The method of claim 1 , wherein the plurality of exception types comprises: performance monitor exceptions, floating-point exceptions, trap exceptions, divide by zero exceptions, out of bounds exceptions, and changes to priority.

5. The method of claim 1 , wherein determining, by the supervisor software, the subset of the plurality of exception types for which to grant handling to the application is performed based on an ability of the application to handle each respective exception type of the plurality of exception types without interfering with any other threads in a processor of the computer system, and wherein at least one of the plurality of exception types is not in the subset of exception types.

6. The method of claim 3 , wherein the determination of whether a type of an exception is one of the subset of exception types is made based on the control register.

7. A computer program product for implementing configurable interrupts for a processor, the computer program product comprising:
a computer readable storage medium having program instructions embodied therewith, the program instructions readable by a processing circuit to cause the processing circuit to perform a method comprising:
sending, by an application to supervisor software in a computer system, a request, the request including a plurality of exception types to be handled by the application;
determining, by the supervisor software, a subset of the plurality of exception types for which to approve handling by the application;
sending a response from the supervisor software to the application notifying the application of the subset of exception types:,
based on an exception occurring in a processor of the computer system during execution of the application, determining whether a type of the exception is one of the subset of exception types; and
based on determining that the type of the exception is one of the subset of exception types, sending a lightweight interrupt corresponding to the exception to an exception handler in the application.

8. The computer program product of claim 7 , the method further comprising, based on determining that the type of the exception is not one of the subset of exception types, interrupting execution of the application and handling the exception by the supervisor software.

9. The computer program product of claim 7 , the method further comprising setting, by the supervisor software, a control register of the processor to indicate the subset of the plurality of exception types.

10. The computer program product of claim 7 , wherein the plurality of exception types comprises: performance monitor exceptions, floating-point exceptions, trap exceptions, divide by zero exceptions, out of bounds exceptions, and changes to priority.

11. The computer program product of claim 7 , wherein determining, by the supervisor software, the subset of the plurality of exception types for which to grant handling to the application is performed based on an ability of the application to handle each respective exception type of the plurality of exception types without interfering with any other threads in a processor of the computer system, and wherein at least one of the plurality of exception types is not in the subset of exception types.

12. The computer program product of claim 9 , wherein the determination of whether a type of an exception is one of the subset of exception types is made based on the control register.

13. A computer system for configurable interrupts for a processor, the system comprising:
a memory; and
the processor, communicatively coupled to said memory, the computer system configured to perform a method comprising:
sending, by an application to supervisor software in a computer system, a request, the request including a plurality of exception types to be handled by the application;
determining, by the supervisor software, a subset of the plurality of exception types for which to approve handling by the application;
sending a response from the supervisor software to the application notifying the application of the subset of exception types;
based on an exception occurring in the processor during execution of the application, determining whether a type of the exception is one of the subset of exception types; and
based on determining that the type of the exception is one of the subset of exception types, sending a lightweight interrupt corresponding to the exception to an exception handler in the application.

14. The computer system of claim 13 , the method further comprising, based on determining that the type of the exception is not one of the subset of exception types, interrupting execution of the application and handling the exception by the supervisor software.

15. The computer system of claim 13 , the method further comprising setting, by the supervisor software, a control register of the processor to indicate the subset of the plurality of exception types.

16. The computer system of claim 13 , wherein the plurality of exception types comprises: performance monitor exceptions, floating-point exceptions, trap exceptions, divide by zero exceptions, out of bounds exceptions, and changes to priority.

17. The computer system of claim 15 , wherein the determination of whether a type of an exception is one of the subset of exception types is made based on the control register.

Assignees

• IBM

Inventors

• Frazier Giles R
• Gschwind Michael Karl

Classifications

• G06F13/26

  with priority control · CPC title

• G06F13/24 Primary

  using interrupt (G06F13/32 takes precedence) · CPC title

• G06F9/4812

  by interrupt, e.g. masked · CPC title

• G06F2209/481

  Exception handling · CPC title

• G06F9/44505

  Configuring for program initiating, e.g. using registry, configuration files · CPC title