Packaging structure and packaging method of electronic product

US10076040B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10076040-B2
Application numberUS-201715460271-A
CountryUS
Kind codeB2
Filing dateMar 16, 2017
Priority dateDec 23, 2016
Publication dateSep 11, 2018
Grant dateSep 11, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A packaging structure and a packaging method of an electronic product are disclosed. The packaging structure of an electronic product includes a supporting structure, a flexible board and a covering layer. The supporting structure has a shape. The flexible board is stacked on the supporting structure, and has an electronic device disposed thereon. The covering layer is attached on the stacked supporting structure and flexible board and covering the electronic device. The shapes of the flexible board and the covering layer conform to the shape of the supporting structure, and the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure. The covering layer includes a thermoforming film and at least a function film stacked on the thermoforming film.

First claim

Opening claim text (preview).

What is claimed is: 1. A packaging structure of an electronic product, comprising: a supporting structure having a shape; a flexible board stacked on the supporting structure, wherein an electronic device is disposed on the flexible board; and a covering layer attached on the stacked supporting structure and flexible board, wherein the covering layer directly contacts the flexible board and directly covers the electronic device, wherein the covering layer comprises a thermoforming film and at least a function film stacked on the thermoforming film, wherein the function film is at least one of a decorative layer, a thermo-conducting layer, a shielding layer and a light diffusion layer, wherein the thermoforming film has a shrinkage temperature and is thermally deformable when the thermoforming film is heated up to the shrinkage temperature to make the function film tightly attached on the flexible board, such that shapes of the flexible board and the covering layer conforms to the shape of the supporting structure, the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure. 2. The packaging structure of an electronic product according to claim 1 , wherein the flexible board comprises an insulation substrate and an electronic circuit. 3. The packaging structure of an electronic product according to claim 2 , wherein the function film is disposed between the thermoforming film and the flexible board. 4. The packaging structure of an electronic product according to claim 2 , wherein the thermoforming film is disposed between the function film and the flexible board. 5. The packaging structure of an electronic product according to claim 1 , wherein the function film comprises a first function film and a second function film, the first function film is disposed on a first surface of the thermoforming film, and the second function film is disposed on a second surface of the thermoforming film, the first surface is opposite to the second surface. 6. The packaging structure of an electronic product according to claim 5 , wherein the first function film and the second function film are at least one of the decorative layer, the thermo-conducting layer, the shielding layer and the light diffusion layer. 7. The packaging structure of an electronic product according to claim 1 , wherein the packaging structure further comprises an adhesive interposed between the flexible board and the supporting structure, or the flexible board and the supporting structure are firmly bonded by using an out-mold packaging method, a high-temperature vacuum adsorption method, a heat pressing method or an ultrasonic welding method. 8. A packaging method of an electronic product, comprising: processing a supporting structure so that the supporting structure has a shape; mounting an electronic device on a flexible board and stacking the flexible board on the supporting structure; and forming a covering layer on the stacked supporting structure and flexible board to make the covering layer directly contact the flexible board and directly cover the electronic device, wherein the covering layer comprises a thermoforming film and at least a function film stacked on the thermoforming film, wherein the function film is at least one of a decorative layer, a thermo-conducting layer, a shielding layer and a light diffusion layer, and the thermoforming film has a shrinkage temperature and is thermally deformable when being heated up to the shrinkage temperature to make the function film tightly attached on the flexible board, such that shapes of the flexible board and the covering layer conform to the shape of the supporting structure, and the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure. 9. The packaging method of an electronic product according to claim 8 , wherein the flexible board comprises an insulation substrate and an electronic circuit. 10. The packaging method of an electronic product according to claim 8 , wherein the function film comprises a first function film and a second function film respectively formed on a first surface and a second surface of the thermoforming film, and the first surface is opposite to the second surface. 11. The packaging method of an electronic product according to claim 10 , wherein the first function film and the second function film are at least one of the decorative layer, the thermo-conducting layer, the shielding layer and the light diffusion layer. 12. The packaging method of an electronic product according to claim 8 , wherein the packaging structure further comprises an adhesive interposed between the flexible board and the supporting structure, or the flexible board and the supporting structure are bonded by using an out-mold packaging method, a high-temperature vacuum adsorption method, a heat pressing method or an ultrasonic welding method.

Assignees

Inventors

Classifications

  • Circuit printed on or in housing, e.g. housing as PCB; Circuit printed on the case of a component; PCB affixed to housing · CPC title

  • H05K3/284Primary

    for encapsulating mounted components (H05K1/185 takes precedence) · CPC title

  • Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

  • Bending or folding regions of flexible printed circuits (H05K1/0283 takes precedence) · CPC title

  • Optical details, e.g. printed circuits comprising integral optical means (H05K1/0269 takes precedence; coupling light guides with opto-electronic components G02B6/42) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10076040B2 cover?
A packaging structure and a packaging method of an electronic product are disclosed. The packaging structure of an electronic product includes a supporting structure, a flexible board and a covering layer. The supporting structure has a shape. The flexible board is stacked on the supporting structure, and has an electronic device disposed thereon. The covering layer is attached on the stacked s…
Who is the assignee on this patent?
Lite On Electronics Guangzhou, Lite On Technology Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/284. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).