GAAS/SIGE-BICMOS-based transceiver system-in-package for E-band frequency applications

Patent metadata

Field	Value
Publication number	US-10075207-B2
Application number	US-201615144193-A
Country	US
Kind code	B2
Filing date	May 2, 2016
Priority date	Apr 30, 2015
Publication date	Sep 11, 2018
Grant date	Sep 11, 2018

Abstract

An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.

First claim

What is claimed is:

1. An e-band transceiver comprising a transmitter circuit and a receiver circuit, wherein the transmitter circuit comprises:
a surface mounted technology (SMT) module including:
a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier; and
a non-volatile memory configured to store calibration data, wherein said calibration data (i) allows a chip by chip calibration and (ii) avoids a calibration rejection procedure.

2. The e-band transceiver of claim 1 , wherein the SiGe BiCMOS converter further comprises a digital interface.

3. The e-band transceiver of claim 2 , wherein the digital interface is configured as a digital control interface for controlling one of bias, type of channel filters and output power levels of the SMT module.

4. The e-band transceiver of claim 3 , wherein the digital control interface is configured as one of an I 2 C or SPI interface.

5. The e-band transceiver of claim 2 , wherein the digital interface is coupled to a non-volatile memory.

6. The e-band transceiver of claim 1 , wherein the SMT module is a system-in-package chip.

7. The e-band transceiver of claim 1 , wherein the receiver circuit comprises:
a receiver-side SMT module including:
a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.

8. The e-band transceiver according to claim 1 , wherein said calibration comprises accounting for mixer bias for full rejection of local oscillator leakage.

9. The e-band transceiver according to claim 1 , wherein said calibration is performed during a package production test phase.

10. The e-band transceiver according to claim 1 , wherein said calibration compensates for process variations of the GaAs output amplifier.

11. The apparatus according to claim 1 , wherein said amplifier is configured to provide higher power levels and higher linearity on a transmitter side.

Assignees

• Integrated Device Tech

Inventors

• Betti-Berutto Andrea
• Kumar Sushil
• Parker Shawn
• Kennedy Jonathan L
• Saint Christopher
• Shaw Michael
• Little James
• Illgner Jeff

Classifications

• H10D84/401

  Combinations of FETs or IGBTs with BJTs · CPC title

• H10W44/226

  for HF amplifiers · CPC title

• H10W44/216

  Waveguides, e.g. strip lines · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W44/20 Primary

  at high-frequency [HF] or radio frequency [RF] · CPC title