Solid-state imaging device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-10074678-B2
Application number	US-201213588469-A
Country	US
Kind code	B2
Filing date	Aug 17, 2012
Priority date	Aug 22, 2011
Publication date	Sep 11, 2018
Grant date	Sep 11, 2018

Abstract

A solid-state imaging device includes a plurality of photoelectric conversion units, a floating diffusion unit that is shared by the plurality of photoelectric conversion units and converts electric charge generated in each of the plurality of photoelectric conversion units into a voltage signal, a plurality of transfer units that are respectively provided in the plurality of photoelectric conversion units and transfer the electric charge generated in the plurality of photoelectric conversion units to the floating diffusion unit, a first transistor group that is electrically connected to the floating diffusion unit and includes a gate and source/drain which are arranged with a first layout configuration, and a second transistor group that is electrically connected to the floating diffusion unit, includes a gate and source/drain arranged with a second layout configuration symmetrical to the first layout configuration, and is provided in a separate area from the first transistor group.

First claim

What is claimed is:

1. A solid-state imaging device comprising:
a transistor in a first transistor group, the first transistor group is between a first floating diffusion area and a second floating diffusion area;
a transistor in a second transistor group, the second floating diffusion area is between the first transistor group and the second transistor group; and
wiring that extends along a straight line in a schematic layout plan view of the solid-state imaging device to electrically connect a gate of the transistor in the first transistor group directly to the first floating diffusion area and directly to the second floating diffusion area, the wiring extends along the straight line to electrically connect the second floating diffusion area directly to a gate of the transistor in the second transistor group.

2. The solid-state imaging device according to claim 1 , further comprising:
a first transfer gate between the first floating diffusion area and a first photodiode along a first diagonal in a schematic layout plan view of the solid-state imaging device.

3. The solid-state imaging device according to claim 2 , wherein the first photodiode is configured to convert light into a unit signal charge.

4. The solid-state imaging device according to claim 2 , further comprising:
a second transfer gate between the first floating diffusion area and a second photodiode along a second diagonal in the schematic layout plan view of the solid-state imaging device.

5. The solid-state imaging device according to claim 4 , wherein the second photodiode is configured to convert light into a unit signal charge.

6. The solid-state imaging device according to claim 4 , wherein a path of the second diagonal intersects a path of the first diagonal at the first floating diffusion area.

7. The solid-state imaging device according to claim 6 , wherein the path of the first diagonal line intersects the wiring at the first floating diffusion area.

8. The solid-state imaging device according to claim 6 , wherein the path of the second diagonal line intersects the wiring at the first floating diffusion area.

9. The solid-state imaging device according to claim 4 , further comprising:
a third transfer gate between the first floating diffusion area and a third photodiode along the second diagonal line.

10. The solid-state imaging device according to claim 9 , wherein the third photodiode is configured to convert light into a unit signal charge.

11. The solid-state imaging device according to claim 9 , further comprising:
a fourth transfer gate between the first floating diffusion area and a fourth photodiode along the second diagonal line.

12. The solid-state imaging device according to claim 11 , wherein the fourth photodiode is configured to convert light into a unit signal charge.

13. The solid-state imaging device according to claim 1 , wherein a size of the transistor in the first transistor group is same as a size of the transistor in the second transistor group.

14. An electronic apparatus comprising:
the solid-state imaging device according to claim 1 ; and
a signal processing circuit that processes a signal from the solid-state imaging device.

Assignees

• Kato Nanako
• Wakano Toshifumi
• Yamamoto Atsuhiko
• Sony Corp

Inventors

• Kato Nanako
• Wakano Toshifumi
• Yamamoto Atsuhiko

Classifications

• H04N25/77 Primary

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H01L27/14605 Primary

  Electricity · mapped topic

• H01L27/14636

  Electricity · mapped topic

• H01L27/14641

  Electricity · mapped topic

• H01L27/1464

  Electricity · mapped topic