Solid state light emitter devices and methods

US10074635B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10074635-B2
Application numberUS-201514802655-A
CountryUS
Kind codeB2
Filing dateJul 17, 2015
Priority dateJul 17, 2015
Publication dateSep 11, 2018
Grant dateSep 11, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Solid state light emitter devices and methods are provided. A solid state light emitter device can include a submount having an upper surface and a bottom surface. At least first pair and a second pair of electrically conductive contacts can be disposed on the bottom surface of the submount. The first pair of contacts can be electrically independent from the second pair of contacts. The device can further include multiple light emitters provided on the upper surface of the submount. The multiple light emitters can be configured into at least a first light emitter zone that is electrically independent from a second light emitter zone upon electrical communication to a respective pair of contacts.

First claim

Opening claim text (preview).

What is claimed is: 1. A solid state light emitter device comprising: a submount comprising an upper surface and a bottom surface; first and second pairs of electrically conductive contacts disposed on the bottom surface of the submount, the first pair of electrically conductive contacts being electrically independent from the second pair of electrically conductive contacts, and each of the first and second pairs of electrically conductive contacts comprising an anode and a cathode; and multiple light emitters disposed on the upper surface of the submount, wherein the multiple light emitters are arranged as first and second light emitter zones that are electrically independent from each other and are separated by an uninterrupted and substantially linear gap along an entire length of the first and second light emitter zones, wherein the anode and the cathode of the first pair of electrically conductive contacts are arranged such that at least a portion of the anode and the cathode are adjacent to opposing edges of the submount, respectively, and wherein the anode and the cathode of the second pair of electrically conductive contacts are arranged such that at least a portion of the anode and the cathode are adjacent to the opposing edges of the submount, respectively. 2. The device of claim 1 , wherein the first and second light emitter zones comprise a same quantity of light emitters. 3. The device of claim 1 , wherein the first and second light emitter zones comprise a different quantity of light emitters. 4. The device of claim 1 , further comprising a first pair of electrically conductive traces and a second pair of electrically conductive traces, both of which are disposed on the upper surface of the submount, wherein the first pair of electrically conductive traces is in electrical communication with the first pair of electrically conductive contacts, and the second pair of electrically conductive traces is in electrical communication with the second pair of electrically conductive contacts. 5. The device of claim 4 , wherein the multiple light emitters are arranged in a plurality of strings of serially connected light emitters, wherein the first light emitter zone comprises two or more strings of the plurality of strings of serially connected light emitters and the second light emitter zone comprises one or more strings of the plurality of strings of serially connected light emitters, wherein the two or more strings of the first light emitter zone are disposed between the first pair of electrically conductive traces, wherein the one or more string of the second light emitter zone is disposed between the second pair of electrically conductive traces, wherein each of the two or more strings of the first light emitter zone are connected in parallel relative to each other, and wherein each string of the second light emitter zone is connected in parallel relative to each other when the second light emitter zone comprises a plurality of strings. 6. The device of claim 5 , wherein the first light emitter zone comprises a different number of strings of serially connected light emitters than the second light emitter zone. 7. The device of claim 1 , wherein light emitters in the first light emitter zone differ from light emitters in the second light emitter zone in regards to a chip size, a chip spacing, a chip structure, or a chip color. 8. The device of claim 1 , wherein the first light emitter zone is configured to emit light having a different correlated color temperature (CCT) than the second light emitter zone. 9. The device of claim 1 , further comprising a filler material disposed over the first and second light emitter zones. 10. The device of claim 9 , wherein a continuous layer of the filler material is disposed over light emitters in the first and second light emitter zones. 11. The device of claim 9 , wherein the filler material comprises a first portion of filler material disposed over the first light emitter zone and a second portion of filler material disposed over the second light emitter zone, the first and second portions being separated from each other by an intermediate retaining structure. 12. The device of claim 11 , wherein the first portion of filler material differs from the second portion of filler material in regards to a phosphor type, a phosphor content, a phosphor loading, or an encapsulant material. 13. A solid state light emitter device comprising: a submount; a plurality of pairs of electrically conductive traces disposed over the submount, wherein each pair of electrically conductive traces is electrically independent from any other pair of the plurality of pairs of electrically conductive traces; and a plurality of light emitters disposed over the submount, the plurality of light emitters being configured as a first light emitter zone between a first pair of the plurality of pairs of electrically conductive traces and a second light emitter zone between a second pair of the plurality of pairs of electrically conductive traces, wherein each light emitter is configured to emit light from a light emitter surface that has two lines of symmetry about a central axis of the submount, and wherein the first and second light emitter zones are separated from each other by an uninterrupted and substantially linear gap along an entire length of the first and second light emitter zones, wherein all of the plurality of pairs of electrically conductive traces are disposed substantially adjacent to a perimeter edge of the submount and have a shape that is a same shape as a portion of at least three external sides of a perimeter of the submount to which a respective one of the plurality of pairs of electrically conductive traces are substantially adjacent. 14. The device of claim 13 , wherein the first and second light emitter zones comprise a same quantity of light emitters. 15. The device of claim 13 , wherein the first and second light emitter zones comprise a different quantity of light emitters. 16. The device of claim 13 , wherein each pair of electrically conductive traces is in electrical communication with a respective pair of electrically conductive contacts and wherein each electrically conductive contact of each respective pair of electrically conductive contacts is disposed at a perimeter edge on a bottom surface of the submount. 17. The device of claim 13 , wherein the plurality of light emitters are arranged in multiple strings of serially connected light emitters, each of which are disposed between a respective one of the plurality of pairs of electrically conductive traces, and wherein each string of the multiple strings of serially connected light emitters is connected in parallel with respect to each other string of the multiple strings of serially connected light emitters that is connected to a same pair of the plurality of pairs of electrically conductive traces. 18. The device of claim 17 , wherein the first and second light emitter zones comprise a different number of the multiple strings of serially connected light emitters. 19. The device of claim 13 , wherein light emitters in the first light emitter zone comprise a different chip size, a different chip spacing, a different chip structure, or a different chip color than light emitters in the second light emitter zone. 20. The device of claim 13 , wherein each light emitter zone is configured to emit light having a different correlated color temperature (CCT). 21. The device of claim 13 , further comprising a filler

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10074635B2 cover?
Solid state light emitter devices and methods are provided. A solid state light emitter device can include a submount having an upper surface and a bottom surface. At least first pair and a second pair of electrically conductive contacts can be disposed on the bottom surface of the submount. The first pair of contacts can be electrically independent from the second pair of contacts. The device …
Who is the assignee on this patent?
Cree Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).