Shunt resistor integrated in a connection lug of a semiconductor module and method for determining a current flowing through a load connection of a semiconductor module

US10074593B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10074593-B2
Application numberUS-201313937745-A
CountryUS
Kind codeB2
Filing dateJul 9, 2013
Priority dateJul 9, 2012
Publication dateSep 11, 2018
Grant dateSep 11, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor module includes a housing, a circuit carrier having an insulation carrier and a metallization layer applied to a side of the insulation carrier, and a connection lug having a first and second load connection sections and a shunt resistor region. The shunt resistor region is electrically arranged between the first and second load connection sections and connected in series with the first and second load connection sections. The shunt resistor region has an ohmic resistance with a temperature coefficient having an absolute value of less than 0.00002/K at a temperature of 20° C. The connection lug in the region of the second load connection section is electrically conductively connected to a first section of the metallization layer by a first cohesive connection. The first load connection section is led out from the housing and has a free end arranged on the outer side of the housing.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor module, comprising: a circuit carrier comprising an insulation carrier and a metallization layer applied to a first side of the insulation carrier; a connection lug comprising a first load connection section, a second load connection section and a shunt resistor region electrically arranged between the first load connection section and the second load connection section and connected in series with the first load connection section and the second load connection; and a housing, wherein the shunt resistor region has an ohmic resistance with a temperature coefficient having an absolute value of less than 0.00002/K at a temperature of 20° C., wherein the connection lug in the region of the second load connection section is electrically conductively connected to a first section of the metallization layer by a first cohesive connection, wherein the first load connection section is led out from the housing and has a free end arranged on the outer side of the housing. 2. The semiconductor module of claim 1 , wherein the shunt resistor region has a greater electrical resistivity than the first load connection section and the second load connection section. 3. The semiconductor module of claim 1 , wherein the shunt resistor region has a resistivity of at least 40*10 −8 Ω·m at a temperature of 20° C. 4. The semiconductor module of claim 1 , wherein the first side of the insulation carrier is planar, wherein the shunt resistor region is arranged completely or at least partly outside a spatial region that is situated perpendicularly above the first side of the insulation carrier and within lateral edges of the insulation carrier, and wherein the shunt resistor region extends at least to above the semiconductor module. 5. The semiconductor module of claim 1 , wherein: the first cohesive connection is a bonded or welded connection and the second load connection section is directly connected to the first section of the metallization layer; or the first cohesive connection is a soldered or sintered connection and the second load connection section is connected to the first section of the metallization layer indirectly by a first connecting layer comprising a solder layer or a sintering layer, and the first connecting layer directly makes contact with both the first section of the metallization layer and the second load connection section. 6. The semiconductor module of claim 1 , wherein the free end of the first load connection section has a screw-on opening. 7. The semiconductor module of claim 1 , wherein the insulation carrier is a ceramic lamina. 8. The semiconductor module of claim 1 , further comprising an electrically conductive connection between the shunt resistor region and the free end of the first load connection section, the electrically conductive connection being devoid of bonding wires. 9. The semiconductor module of claim 1 , further comprising an electrically conductive connection between the shunt resistor region and the free end of the first load connection section, the electrically conductive connection having only a single joint formed by a cohesive connection between the shunt resistor region and the first load connection section. 10. The semiconductor module of claim 1 , further comprising a sense connection section electrically conductively connected to the shunt resistor region on a same side of the shunt resistor region as the first load connection section. 11. The semiconductor module of claim 10 , wherein the sense connection section is led out from the housing such that a free end of the first sense connection section is disposed on an outer side of the housing and forms an external connection of the semiconductor module. 12. The semiconductor module of claim 1 , further comprising a sense connection section electrically conductively connected to the shunt resistor region on a same side of the shunt resistor region as the second load connection section. 13. The semiconductor module of claim 12 , wherein the sense connection section is electrically conductively connected to a second section of the metallization layer cohesively in a region of the sense connection section by a second cohesive connection, and wherein: the second cohesive connection is a bonded or welded connection and the sense connection section is directly connected to the second section of the metallization layer; or the second cohesive connection is a soldered or sintered connection and the connection section is connected to the second section of the metallization layer indirectly by a second connecting layer comprising a solder layer or a sintering layer, and the second connecting layer directly contacts the second section of the metallization layer and the sense connection section. 14. The semiconductor module of claim 1 , wherein the second load connection section is electrically conductively connected to a second section of the metallization layer by an additional cohesive connection, and wherein: the additional cohesive connection is a bonded or welded connection and the second load connection section is directly connected to the second section of the metallization layer; or the additional cohesive connection is a soldered or sintered connection and the second load connection section is connected to the second section of the metallization layer indirectly by a third connecting layer comprising a solder layer or a sintering layer, and the third connecting layer directly contacts the second section of the metallization layer and the second load connection section. 15. The semiconductor module of claim 14 , further comprising a connecting conductor electrically conductively connected to the second section of the metallization layer, wherein the circuit carrier and the shunt resistor region are arranged in the housing and from which the connecting conductor is led out such that a free end of the connecting conductor is disposed on an outer side of the housing and forms an external connection of the semiconductor module. 16. The semiconductor module of claim 1 , further comprising a semiconductor chip comprising a semiconductor component having a load path electrically connected in series with the shunt resistor region. 17. The semiconductor module of claim 16 , wherein the second load connection section is electrically connected between the shunt resistor region and the load path. 18. A method for determining a current flowing through a load connection of a semiconductor module comprising a circuit carrier having an insulation carrier and a metallization layer applied to a first side of the insulation carrier, a connection lug comprising a first load connection section, a second load connection section and a shunt resistor region electrically arranged between the first load connection section and the second load connection section and connected in series with the first load connection section and the second load connection, and a housing, wherein the shunt resistor region has an ohmic resistance with a temperature coefficient having an absolute value of less than 0.00002/K at a temperature of 20° C., wherein the connection lug in the region of the second load connection section is electrically conductively connected to a first section of the metallization layer by a first cohesive connection, the method comprising: determining a voltage dropped across the shunt resistor region; and determining the current flowing through the load connection based on the voltage dropped and based on the ohmic resistance of the shunt resistor region.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • having interconnections parallel to the insulating or insulated base · CPC title

  • Containers comprising an insulating or insulated base · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10074593B2 cover?
A semiconductor module includes a housing, a circuit carrier having an insulation carrier and a metallization layer applied to a side of the insulation carrier, and a connection lug having a first and second load connection sections and a shunt resistor region. The shunt resistor region is electrically arranged between the first and second load connection sections and connected in series with t…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W76/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).