Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
Sealing sheet
US10074582B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10074582-B2 |
| Application number | US-201515507923-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 21, 2015 |
| Priority date | Sep 3, 2014 |
| Publication date | Sep 11, 2018 |
| Grant date | Sep 11, 2018 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried in the sealing sheet. The sealing sheet has a viscosity within the range of 1 Pa·s to 50000 Pa·s at 90° C.
First claim
Opening claim text (preview).
The invention claimed is: 1. A sealing sheet, having a viscosity at 90° C. that ranges from 1 to 50000 Pa·s, wherein when a sealing sheet piece obtained by cutting out the sealing sheet into a size of 22 cm in length×22 cm in width is put onto a chip-stacked glass carrier of 22 cm in length×22 cm in width, on which semiconductor chips each of 7 mm in length×7 mm in width×200 μm in thickness are mounted to have a chip-mounted interval (interval between edges of any adjacent two of the chips) of 3 mm, the number of the chips being 20 in each length direction line of the carrier and being 20 in each width direction line thereof, and then the resultant product is flat-plate-pressed at a pressing pressure of 1 MPa and a pressing temperature of 90° C. for a pressing period of 120 seconds, the ratio of a change in the dimension of the resultant product after the flat-plate pressing is 20% or less of the dimension of the resultant product which is not yet pressed before the flat-plate-pressing.
Assignees
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Classifications
the encapsulations exposing the passive side of the semiconductor body · CPC title
using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title
using batch processing · CPC title
on encapsulations · CPC title
Dispositions, e.g. layouts · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10074582B2 cover?
- Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried in the sealing sheet. The sealing sheet has a viscosity within the range of 1 Pa·s to 50000 Pa·s at 90° C.
- Who is the assignee on this patent?
- Nitto Denko Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W70/09. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).