Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US10069422B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10069422-B2 |
| Application number | US-201715448376-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 2, 2017 |
| Priority date | Mar 3, 2016 |
| Publication date | Sep 4, 2018 |
| Grant date | Sep 4, 2018 |
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A synchronous switching converter has an integrated semiconductor device. The integrated semiconductor device has a first semiconductor component and a second semiconductor component coupled in parallel. The first semiconductor component has MOSFET cells with body diodes, and the second semiconductor component has diode cells or MOSFET cells with a low forward voltage. Cells of the second semiconductor component distribute among the first semiconductor component unevenly according to a distribution of a current flowing through the integrated semiconductor device.
Opening claim text (preview).
We claim: 1. An integrated semiconductor device utilized in synchronous switching converters, comprising: a first semiconductor component, comprising a first Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a body diode, wherein the first MOSFET has a source, a drain and a gate; and a second semiconductor component, coupled in parallel with the first semiconductor component, wherein the second semiconductor component comprises a diode with an anode and a cathode, wherein the anode of the diode is coupled to the source of the first MOSFET, the cathode of the diode is coupled to the drain of the first MOSFET, wherein a forward voltage of the diode is lower than a forward voltage of the body diode in the first MOSFET; wherein cells of the second semiconductor component are configured to distribute among the first semiconductor component unevenly according to a distribution of a current flowing through the integrated semiconductor device. 2. The integrated semiconductor device utilized in synchronous switching converters of claim 1 , wherein the integrated semiconductor device comprises at least a first cell of the second semiconductor component and a second cell of the second semiconductor component, an area of the second cell of the second semiconductor component is larger than an area of the first cell of the second semiconductor component when a current flowing through the second cell of the second semiconductor component is larger than a current flowing through the first cell of the second semiconductor component. 3. The integrated semiconductor device utilized in synchronous switching converters of claim 2 , wherein an area ratio of the second semiconductor component to the first semiconductor component is configured to decrease in a first direction, wherein the first direction is perpendicular to a direction of the current flowing through the integrated device. 4. The integrated semiconductor device utilized in synchronous switching converters of claim 2 , wherein an area ratio of the second semiconductor component to the first semiconductor is configured to decrease in a second direction, wherein the second direction is parallel to a direction of the current flowing through the integrated device. 5. The integrated semiconductor device utilized in synchronous switching converters of claim 2 , wherein the area ratio of the second semiconductor component to the first semiconductor is configured to decrease in both a first direction and a second direction simultaneously, wherein the first direction is perpendicular to a direction of the current flowing through the integrated device, the second direction is parallel to the direction of the current flowing through the integrated device, the first direction is perpendicular to the second direction. 6. The integrated semiconductor device utilized in synchronous switching converters of claim 2 , wherein an area ratio of the second semiconductor component to the first semiconductor component is configured to increase in both a first direction and a third direction, wherein both the first direction and the third direction are perpendicular to a direction of the current flowing through the integrated device, the first direction is opposite to the third direction. 7. The integrated semiconductor device utilized in synchronous switching converters of claim 2 , wherein an area ratio of the second semiconductor component to the first semiconductor component is configured to increase in both a first direction and a third direction and decrease in a second direction, wherein both the first direction and the third direction are perpendicular to a direction of the current flowing through the integrated device, the second direction is parallel to the direction of the current flowing through the integrated device, the first direction is opposite to the third direction, and the second direction is perpendicular to the first direction and the third direction. 8. An integrated semiconductor device utilized in synchronous switching converters, comprising: a first semiconductor component, comprising a first Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a body diode, wherein the first MOSFET has a source, a drain and a gate; and a second semiconductor component, coupled in parallel with the first semiconductor component, wherein the second semiconductor component comprises a second MOSFET, the second MOSFET has a source, a drain and a gate, the drain of the second MOSFET in the second semiconductor component is coupled to the drain of the first MOSFET, both the source and the gate of the second are coupled to the source of the first MOSFET, and a threshold voltage of the second MOSFET is lower than a threshold voltage of the first MOSFET, wherein the threshold voltage of the first MOSFET is a lowest voltage needed to turn on the first MOSFET, the threshold voltage of the second MOSFET is a lowest voltage needed to turn on the second MOSFET; wherein cells of the second semiconductor component are configured to distribute among the first semiconductor component unevenly according to a distribution of a current flowing through the integrated semiconductor device. 9. The integrated semiconductor device utilized in synchronous switching converters of claim 8 , wherein the integrated semiconductor device comprises at least a first cell of the second semiconductor component and a second cell of the second semiconductor component, an area of the second cell of the second semiconductor component is larger than an area of the first cell of the second semiconductor component when a current flowing through the second cell of the second semiconductor component is larger than a current flowing through the first cell of the second semiconductor component. 10. A synchronous switching converter, having an input terminal and an output terminal utilized to provide an output signal, the synchronous switching converter comprising: an input capacitor, having a first terminal and a second terminal, wherein the first terminal is coupled to the input terminal, the second terminal is coupled to a system ground; a power switch, configured to adjust the output signal; an inductor, configured to store energy when the power switch is on and release energy when the power switch is off; a synchronous switch, configured to be an integrated semiconductor device to provide a path for a current of the inductor when the power switch is off, wherein the integrated semiconductor device comprises a first semiconductor component and a second semiconductor component coupled in parallel, cells of the second semiconductor component are configured to distribute among the first semiconductor component unevenly according to a distribution of a current flowing through the inductor; and an output capacitor, having a first terminal and a second terminal, wherein the first terminal of the output capacitor is coupled to the output terminal, the second terminal of the output capacitor is coupled to the system ground. 11. A synchronous switching converter of claim 10 , wherein an area of a cell of the second semiconductor component increases when a distance of the cell of a second semiconductor component to the input capacitor increases. 12. A synchronous switching converter of claim 10 , comprising a step-down synchronous switching converter, wherein the power switch has a source, a drain and a gate, wherein the drain of the power switch is coupled to the input terminal, the gate of the power switch is configured to receive a first switch control signal; the synchronous switch has a source, a drain and a gate, wherein the drain of the synchronous switch is coupled to the sour
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using semiconductor devices only · CPC title
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