Integrated circuit having first and second magnetic field sensing elements

US10069063B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10069063-B2
Application numberUS-201615395083-A
CountryUS
Kind codeB2
Filing dateDec 30, 2016
Priority dateJan 20, 2006
Publication dateSep 4, 2018
Grant dateSep 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit, comprising: a lead frame; a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the lead frame such that the second surface of the first substrate is above the lead frame and the first surface of the first substrate is above the second surface of the first substrate; a second substrate having first and second opposing surfaces, wherein the second substrate is coupled to the lead frame such that the second surface of the second substrate is above the lead frame and the first surface of the second substrate is above the second surface of the second substrate; an electronic component disposed on the first surface of the first substrate or on the first surface of the second substrate; a first magnetic field sensing element disposed on the first surface of the second substrate; and a second magnetic field sensing element disposed on the first surface of the first substrate, wherein the first magnetic field sensing element has a first sensitivity to a magnetic field, wherein the second magnetic field sensing element has a second sensitivity to the magnetic field different than the first sensitivity, and wherein the integrated circuit is configured to provide a first operating range responsive to the first magnetic field sensing element and a second operating range different than the first operating range responsive to the second magnetic field sensing element. 2. The integrated circuit of claim 1 , wherein the first and second substrates are comprised of different materials. 3. The integrated circuit of claim 2 , wherein the first substrate is comprised of Si and the second substrate is comprised of GaAs. 4. The integrated circuit of claim 2 , wherein the first substrate is comprised of GaAs and the second substrate is comprised of Si. 5. The integrated circuit of claim 2 , wherein the lead frame comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the first and second magnetic field sensing elements are configured to be responsive to a current flowing through the current conductor portion. 6. The integrated circuit of claim 1 , wherein the first surface of the second substrate is coupled to the first surface of the first substrate with a wire bond. 7. The integrated circuit of claim 1 , wherein the lead frame comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the first and second magnetic field sensing elements are configured to be responsive to a current flowing through the current conductor portion. 8. The integrated circuit of claim 1 , wherein the first and second magnetic field sensing elements are configured to be responsive to a current passing through a conductor proximate to and outside of the integrated circuit. 9. The integrated circuit of claim 1 , further including at least one flux concentrator disposed proximate to at least one of the first magnetic field sensing element or the second magnetic field sensing element. 10. The integrated circuit of claim 1 , further comprising: a current conductor disposed proximate to the second substrate; and a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the first surface of the second substrate. 11. The integrated circuit of claim 1 , wherein the first magnetic field sensing element is a Hall effect element and the second magnetic field sensing element is a magnetoresistance element. 12. The integrated circuit of claim 11 , wherein the lead frame comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the first and second magnetic field sensing elements, and wherein the first and second magnetic field sensing elements are configured to be responsive to a current flowing through the current conductor portion. 13. The integrated circuit of claim 1 , wherein the first magnetic field sensing element is a planar Hall effect element and the second magnetic field sensing element is a vertical Hall effect element. 14. The integrated circuit of claim 13 , wherein the lead frame comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the first and second magnetic field sensing elements, and wherein the first and second magnetic field sensing elements are configured to be responsive to a current flowing through the current conductor portion. 15. The integrated circuit of claim 1 , wherein the electronic component comprises a passive electronic component or an active electronic component. 16. The integrated circuit of claim 1 , wherein the lead frame comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the first and second magnetic field sensing elements, and wherein the first and second magnetic field sensing elements are configured to be responsive to a current flowing through the current conductor portion. 17. The integrated circuit of claim 1 , further comprising a current conductor disposed proximate the first and second magnetic field sensing elements, wherein the first and second magnetic field sensing elements are configured to be responsive to magnetic field generated by a current passing through the current conductor.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between laterally-adjacent chips · CPC title

  • Package configurations · CPC title

  • Shapes or dispositions · CPC title

  • H01L43/02Primary

    Electricity · mapped topic

Patent family

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Frequently asked questions

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What does patent US10069063B2 cover?
An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces th…
Who is the assignee on this patent?
Allegro Microsystems Llc
What technology area does this patent fall under?
Primary CPC classification H01L43/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).