Faradaic energy storage device structures and associated techniques and configurations

US10068718B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10068718-B2
Application numberUS-201615184847-A
CountryUS
Kind codeB2
Filing dateJun 16, 2016
Priority dateApr 26, 2013
Publication dateSep 4, 2018
Grant dateSep 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present disclosure are directed towards Faradaic energy storage device structures and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a substrate having a plurality of holes disposed in a surface of the substrate, the plurality of holes being configured in an array of multiple rows and an active material for Faradaic energy storage disposed in the plurality of holes to substantially fill the plurality of holes. Other embodiments may be described and/or claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: forming a plurality of holes in a surface of a substrate, wherein the substrate is composed of a photosensitive polymer; and depositing an active material for Faradaic energy storage to substantially fill the plurality of holes, wherein the active material includes a plurality of discrete particles formed of a pseudo-capacitive material in powder form, an electrically conductive additive mixed with the pseudo-capacitive material, and a binder material; wherein forming the plurality of holes comprises: patterning the photosensitive polymer using photolithography; removing portions of the patterned polymer using a development process; and converting the polymer to an electrically conductive material. 2. The method of claim 1 , wherein depositing the active material comprises depositing the pseudo-capacitive material using one or more of a doctor-blading, drop-casting, spin-casting or vacuum casting technique. 3. The method of claim 1 , further comprising: forming a barrier liner on material of the substrate in the plurality of holes prior to depositing the active material, wherein the barrier liner includes an electrically conductive material disposed between the material of the substrate and the active material. 4. The method of claim 1 , wherein the active material is a first active material, the method further comprising: forming an electrolyte coupled with the first active material; and depositing a second active material, the second active material being coupled with the electrolyte, wherein the electrolyte is disposed between the first active material and the second active material to conduct ions between the first active material and the second active material, and the first active material has a standard electrode potential that is different than a standard electrode potential of the second active material. 5. A method comprising: forming a plurality of holes in a surface of a substrate; and depositing an active material for Faradaic energy storage to substantially fill the plurality of holes, wherein the active material includes a plurality of discrete particles formed of a pseudo-capacitive material in powder form, an electrically conductive additive mixed with the pseudo-capacitive material, and a binder material, wherein: the substrate is composed of silicon; forming the plurality of holes comprises etching the substrate using an anisotropic wet etch process; and the plurality of holes are configured in an array of multiple rows. 6. The method of claim 2 , wherein depositing the active material comprises depositing the pseudo-capacitive material using one or more of a doctor-blading, drop-casting, spin-casting or vacuum casting technique. 7. The method of claim 2 , further comprising: forming a barrier liner on material of the substrate in the plurality of holes prior to depositing the active material, wherein the barrier liner includes an electrically conductive material disposed between the material of the substrate and the active material. 8. A method comprising: forming a first plurality of holes in a surface of a substrate; depositing an active material for Faradaic energy storage to substantially fill the first plurality of holes, wherein the active material includes a plurality of discrete particles formed of a pseudo-capacitive material in powder form, an electrically conductive additive mixed with the pseudo-capacitive material, and a binder material; forming a second plurality of holes in the surface of the substrate; and forming an ion channel between at least a first hole of the first plurality of holes and a second hole of the second plurality of holes; depositing a second active material in the second plurality of holes; and depositing an electrolyte in the ion channel, wherein the first active material has a standard electrode potential that is different than a standard electrode potential of the second active material. 9. The method of claim 8 , wherein: the substrate is composed of metal or semiconductive material; forming the first plurality of holes comprises etching the substrate; and the first plurality of holes are configured in an array of multiple rows. 10. The method of claim 9 , wherein the substrate is composed of silicon and forming the first plurality of holes comprises etching the substrate using an anisotropic wet etch process. 11. The method of claim 8 , wherein the substrate is composed of a photosensitive polymer and forming the first plurality of holes comprises: patterning the photosensitive polymer using photolithography; removing portions of the patterned polymer using a development process; and converting the polymer to an electrically conductive material. 12. The method of claim 8 , wherein depositing the active material comprises depositing the pseudo-capacitive material using one or more of a doctor-blading, drop-casting, spin-casting or vacuum casting technique. 13. The method of claim 8 , further comprising: forming a barrier liner on material of the substrate in the first plurality of holes prior to depositing the active material, wherein the barrier liner includes an electrically conductive material disposed between the material of the substrate and the active material.

Assignees

Inventors

Classifications

  • Local etching · CPC title

  • Liquid compositions therefor, e.g. developers · CPC title

  • Electrodes · CPC title

  • Energy storage using capacitors · CPC title

  • H01G11/84Primary

    Processes for the manufacture of hybrid or EDL capacitors, or components thereof · CPC title

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What does patent US10068718B2 cover?
Embodiments of the present disclosure are directed towards Faradaic energy storage device structures and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a substrate having a plurality of holes disposed in a surface of the substrate, the plurality of holes being configured in an array of multiple rows and an active material for Faradaic …
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H01G11/84. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).