Reference signal generator

Patent metadata

Field	Value
Publication number	US-10063245-B2
Application number	US-201515533957-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Dec 8, 2014
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

In a reference signal generator including a synchronization circuit configured to convert a digital signal into an analog signal, supply this signal to a voltage controlled oscillator, and control the voltage controlled oscillator to obtain a signal synchronized with the reference signal, without an accumulation of quantization error in a holdover control in which an acquisition of a reference signal is not available. The reference signal generator includes a phase synchronization circuit and a controller. The phase synchronization circuit controls the reference signal outputted from the oscillator, according to a control signal obtained based on the reference signal. The controller generates a free-running control signal and controls the oscillator when the reference signal becomes unavailable. The oscillator receives discrete values and oscillates accordingly. A digital delta-sigma modulator configured to modulate the free-running control signal of the controller is disposed in a subsequent stage of the controller.

First claim

The invention claimed is:

1. A reference signal generator, comprising:
an oscillator configured to receive discrete values and to oscillate according to the discrete values, and
synchronization circuitry configured:
to control a reference signal outputted from the oscillator, according to a control signal obtained based on a reference signal,
to generate a holdover control signal, and
to control the oscillator when an acquisition of the reference signal becomes unavailable, wherein,

the synchronization circuitry further configured:
to modulate the holdover control signal,
to quantize input values at a resolution equal to a resolution of the oscillator, and
to output the discrete values by changing an appearance ratio between a pair of the discrete values numerically adjacent to each other sandwiching the input value according to a value below a value indicating a quantization resolution.

2. The reference signal generator of claim 1 , wherein the oscillator includes a D/A converter and an analog oscillator disposed in a subsequent stage of the D/A converter.

3. The reference signal generator of claim 1 , wherein the oscillator includes a digital oscillator.

4. The reference signal generator of claim 1 , wherein the synchronization circuitry is further configured to modulate the holdover control signal with a delta-sigma principle.

5. The reference signal generator of claim 1 , wherein a sampling cycle for the synchronization circuitry to modulate is equal to a control cycle of the oscillator.

6. The reference signal generator of claim 1 , wherein a sampling cycle for the synchronization circuitry to modulate by oversampling is different from a control cycle of the oscillator.

7. The reference signal generator of claim 2 , wherein,
the synchronization circuit is further configured:
to divide the reference signal outputted from the oscillator, to generate a phase comparison signal, and to output the phase comparison signal,
to detect a phase difference between the reference signal and the phase comparison signal, to generate a phase difference signal, and to output the phase difference signal,
to average the phase difference signal and to output the control signal, and
to modulate the holdover control signal according to the control signal.

8. The reference signal generator of claim 7 , wherein
the synchronization circuit further configured
to filter the phase noise in a stage subsequent to the D/A converter and precedent to the oscillator.

9. The reference signal generator of claim 2 , wherein the synchronization circuitry further configured to modulate the holdover control signal with a delta-sigma principle.

10. The reference signal generator of claim 9 , wherein,
the synchronization circuit is further configured:
to divide the reference signal outputted from the oscillator, to generate a phase comparison signal, and to output the phase comparison signal,
to detect a phase difference between the reference signal and the phase comparison signal, to generate a phase difference signal, and to output the phase difference signal,
to average the phase difference signal and to output the control signal,
to modulate the holdover control signal according to the control signal.

11. The reference signal generator of claim 10 , wherein,
the synchronization circuit is further configured
to filter the phase noise in a stage subsequent to the D/A converter and precedent to the oscillator.

12. The reference signal generator of claim 9 , wherein a sampling cycle for the synchronization circuitry to modulate by oversampling is different from a control cycle of the oscillator.

13. The reference signal generator of claim 12 , wherein,
the synchronization circuit is further configured:
to divide the reference signal outputted from the oscillator, to generate a phase comparison signal, and to output the phase comparison signal,
to detect a phase difference between the reference signal and the phase comparison signal, to generate a phase difference signal, and to output the phase difference signal,
to average the phase difference signal and to output the control signal, and
to modulate the holdover control signal according to the control signal.

14. The reference signal generator of claim 13 , wherein,
the synchronization circuit is further configured
to filter the phase noise in a stage subsequent to the D/A converter and precedent to the oscillator.

15. The reference signal generator of claim 2 , wherein a sampling cycle for the synchronization circuitry to modulate by oversampling is different from a control cycle of the oscillator.

16. The reference signal generator of claim 15 , wherein,
the synchronization circuit is further configured
to divide the reference signal outputted from the oscillator, to generate a phase comparison signal, and to output the phase comparison signal,
to detect a phase difference between the reference signal and the phase comparison signal, to generate a phase difference signal, and to output the phase difference signal,
to average the phase difference signal and to output the control signal, and
to modulate the holdover control signal according to the control signal.

17. The reference signal generator of claim 16 , wherein,
the synchronization circuit is further configured
to filter the phase noise in a stage subsequent to the D/A converter and precedent to the oscillator.

18. The reference signal generator of claim 3 , wherein the synchronization circuitry further configured to modulate the holdover control signal with a delta-sigma principle.

19. The reference signal generator of claim 18 , wherein a sampling cycle for the synchronization circuitry to modulate by oversampling is different from a control cycle of the oscillator.

20. The reference signal generator of claim 3 , wherein a sampling cycle for the synchronization circuitry to modulate by oversampling is different from a control cycle of the oscillator.

Assignees

• Furuno Electric Co

Inventors

• Hashimoto Kunihiko

Classifications

• H03L7/0992 Primary

  comprising a counter or a frequency divider · CPC title

• H03L7/091

  the phase or frequency detector using a sampling device (H03L7/087 takes precedence) · CPC title

• H04L7/04

  Speed or phase control by synchronisation signals {(H04L7/0075 takes precedence)} · CPC title

• H03L7/0805 Primary

  the loop being adapted to provide an additional control signal for use outside the loop · CPC title

• H03L7/143

  by switching the reference signal of the phase-locked loop · CPC title