Semiconductor device

Patent metadata

Field	Value
Publication number	US-10063205-B2
Application number	US-201715706438-A
Country	US
Kind code	B2
Filing date	Sep 15, 2017
Priority date	Oct 20, 2016
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

In a related-art semiconductor device, there is a problem that a second-order harmonic distortion originating in a power amplifier driven by a rectangular-wave signal cannot be effectively suppressed. According to an embodiment, a semiconductor device generates a transmission signal RF_OUT for driving an antenna by receiving first transmission pulses INd_P and second transmission pulses INd_N having a duty ratio lower than 50%, adjusting a phase difference between the first and second transmission pulses INd_P and INd_N to a predefined phase difference, and supplying the phase-difference-adjusted first and second transmission pulses INd_P and INd_N to a power amplifier 54.

First claim

What is claimed is:

1. A semiconductor device comprising:
a phase difference adjustment circuit configured to receive first transmission pulses having a duty ratio lower than 50% and second transmission pulses having a duty ratio lower than 50% and correct an amount of phase difference of the second transmission pulses relative to the first transmission pulses, the second transmission pulses having a phase delayed from a phase of the first transmission pulses;
a power amplifier configured to generate a transmission signal based on the first and second transmission pulses output from the phase difference adjustment circuit and drive an antenna by the transmission signal; and
a phase difference setting circuit configured to generate a phase control value according to a phase difference between the first and second transmission pulses and control an amount of phase difference between the first and second transmission pulses by providing the phase control value to the phase difference adjustment circuit.

2. The semiconductor device according to claim 1 , wherein the phase difference setting circuit determines the phase control value so that the phase difference between the first and second transmission pulses becomes 180 degrees.

3. The semiconductor device according to claim 1 , wherein the phase difference setting circuit comprises:
a phase difference detector configured to output a rectangular wave having rising edges corresponding to rising edges of the first transmission pulses input to the power amplifier and falling edges corresponding to rising edges of the second transmission pulses input to the power amplifier as a phase difference detection signal;
a smoothing circuit configured to smooth the phase difference detection signal and output a DC (Direct-Current) voltage signal having a signal level corresponding to the duty ratio of the phase difference detection signal as a phase difference correspondence voltage;
a comparison circuit configured to output a measurement result signal whose logic level is determined according to a relation between magnitudes of a phase difference reference voltage and the phase difference correspondence voltage, the phase difference reference voltage having a predefined voltage value; and
a transmission pulse control circuit configured to increase or decrease the phase control value according to the measurement result signal.

4. The semiconductor device according to claim 3 , wherein the phase difference setting circuit comprises:
a first switch configured to select whether or not the phase difference detection signal is supplied to a non-inverting input terminal of the comparison circuit through the smoothing circuit;
a second switch configured to select whether or not the phase difference reference voltage is supplied to an inverting input terminal of the comparison circuit;
a third switch configured to select whether or not the phase difference detection signal is supplied to the inverting input terminal of the comparison circuit through the smoothing circuit; and
a fourth switch configured to select whether or not the phase difference reference voltage is supplied to the non-inverting input terminal of the comparison circuit.

5. The semiconductor device according to claim 4 , wherein the transmission pulse control circuit performs:
a first phase difference correction process in which the phase control value is increased or decreased by turning on a first switch group including the first and second switches and turning off a second switch group including the third and fourth switches; and
a second phase difference correction process in which the phase control value is increased or decreased by turning off the first switch group and turning on the second switch group.

6. The semiconductor device according to claim 3 , further comprising a duty ratio adjustment circuit configured to correct a duty ratio of the first and second transmission pulses according to a duty control value and supply the corrected first and second transmission pulses to the phase difference adjustment circuit, wherein
the transmission pulse control circuit performs:
a first duty ratio correction process in which the duty ratio of the first transmission pulses is corrected to a predefined specific duty ratio by increasing or decreasing the duty control value according to a result of a comparison between a first smoothed voltage and a duty ratio reference voltage by the comparison circuit, the first smoothed voltage being obtained by smoothing the first transmission pulses by the smoothing circuit, the duty ratio reference voltage having a predefined voltage value; and
a second duty ratio correction process in which the duty ratio of the second transmission pulses is corrected to a predefined specific duty ratio by increasing or decreasing the duty control value according to a result of a comparison between a second smoothed voltage and the duty ratio reference voltage by the comparison circuit, the second smoothed voltage being obtained by smoothing the second transmission pulses by the smoothing circuit.

7. The semiconductor device according to claim 6 , wherein the duty ratio has a value lower than 50%.

8. The semiconductor device according to claim 1 , wherein the power amplifier is a class E amplifier comprising a differential pair to which the first and second transmission pulses are input, and a resonant circuit driven by the differential pair.

9. The semiconductor device according to claim 8 , wherein the resonant circuit comprises:
an inductor disposed between drains of two transistors constituting the differential pair;
a capacitor disposed in parallel with the inductor; and
a balun comprising a primary coil disposed in parallel with the inductor.

Assignees

• Renesas Electronics Corp

Inventors

• Mizokami Masakazu

Classifications

• H03F1/0227 Primary

  using supply converters · CPC title

• G01R25/04

  involving adjustment of a phase shifter to produce a predetermined phase difference, e.g. zero difference · CPC title

• H03G3/3042 Primary

  in modulators, frequency-changers, transmitters or power amplifiers · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F1/0233 Primary

  by using a signal derived from the output signal, e.g. bootstrapping the voltage supply · CPC title