Electro-Optical Device and Electronic Device
US-2015194631-A1 · Jul 9, 2015 · US
US10062864B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10062864-B2 |
| Application number | US-201514721698-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 26, 2015 |
| Priority date | May 27, 2014 |
| Publication date | Aug 28, 2018 |
| Grant date | Aug 28, 2018 |
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An apparatus can include a first electrode on a planarization layer, an organic emission layer on the first electrode, a first bank and a second bank on the planarization layer and configured to surround the organic emission layer, and an anti-moisture unit on a portion of the planarization layer and a portion of the second bank, wherein the anti-moisture unit is configured to suppress moisture permeation through the second bank and the planarization layer.
Opening claim text (preview).
What is claimed is: 1. An apparatus comprising: a first electrode on a planarization layer disposed in a display area including a plurality of pixels, the planarization layer including a portion protruded into a non-display area disposed outside the display area; a first bank separating the plurality of pixels in the display area, the first bank disposed only in the display area; a second bank on the protruded portion of the planarization layer at a border of the display area and the non-display area; an anti-moisture layer disposed only in the non-display area, the anti-moisture layer covering side and upper surfaces of a first portion of the second bank corresponding to the non-display area and side and upper surfaces of the protruded portion of the planarization layer in the non-display area; and a second electrode on an organic emission layer, the first bank, the second bank and a portion of the anti-moisture layer, the second electrode covering an upper surface of the portion of the anti-moisture layer corresponding to the first portion of the second bank, wherein the anti-moisture layer is disposed between the second electrode and the second bank, and wherein the anti-moisture layer contacts a lower surface of the second electrode, the side and upper surfaces of the first portion of the second bank, and the side and upper surfaces of the protruded portion of the planarization layer. 2. The apparatus of claim 1 , wherein the second electrode is configured to seal the organic emission layer with an overlapping portion of the anti-moisture layer with the second electrode, and wherein a second portion of the second bank at the display area is covered with the second electrode. 3. The apparatus of claim 1 , wherein the planarization layer, the first bank and the second bank are formed of an organic material. 4. The apparatus of claim 1 , further comprising: a gate driver at the non-display area, wherein the gate driver is a gate-in-panel type and the planarization layer covers the gate driver. 5. The apparatus of claim 1 , further comprising: a passivation layer on the anti-moisture layer and on the second electrode. 6. The apparatus of claim 1 , wherein the anti-moisture layer made of an inorganic thin layer is configured to cover an extended portion into the non-display area of the planarization layer made of an organic material. 7. The apparatus of claim 4 , wherein the gate driver is covered by an extended portion of the planarization layer. 8. The apparatus of claim 5 , wherein the passivation layer directly contacts the anti-moisture layer. 9. The apparatus of claim 5 , wherein the passivation layer is made of a same material of the anti-moisture layer. 10. The apparatus of claim 1 , wherein the anti-moisture layer includes at least two stepped portions. 11. An apparatus comprising: a first substrate including a display area and a non-display area disposed outside the display area; a plurality of pixels including a plurality of transistors and a plurality of organic light emitting diodes including a first electrode, an organic emission layer and a second electrode stacked in sequence on the first substrate in the display area; a planarization layer including a portion protruded into the non-display area and interposed between the plurality of transistors and the plurality of organic light emitting diodes; a gate insulation layer of the plurality of transistors including a portion protruded into the non-display area and interposed between the planarization layer and the first substrate; a first bank in the display area and a second bank in the non-display area, the first and second banks disposed on the planarization layer and configured to surround the organic emission layer, the first bank disposed only in the display area; an anti-moisture layer disposed only in the non-display area, the anti-moisture layer covering side and upper surfaces of a portion of the second bank corresponding to the non-display area and side and upper surfaces of the protruded portion of the planarization layer in the non-display area; a passivation layer on the anti-moisture layer; and a second substrate being opposite to the first substrate and disposed on the passivation layer, wherein the anti-moisture layer is disposed between the second electrode and the second bank, and wherein the anti-moisture layer contacts a lower surface of the second electrode, the side and upper surfaces of the portion of the second bank, the side and upper surfaces of the protruded portion of the planarization layer, a side surface of the gate insulation layer and an upper surface of the first substrate. 12. The apparatus according to claim 11 , wherein the protruded portion of the gate insulation layer includes the side surface covered by the anti-moisture layer. 13. The apparatus according to claim 11 , wherein the first substrate is extended from edges of the protruded portion of the planarization layer and the gate insulation layer, and the anti-moisture layer is configured to be in contact with a protruded portion of the substrate. 14. The apparatus according to claim 11 , wherein the planarization layer and the second bank are formed of organic material and the anti-moisture layer is made of inorganic thin layer such that anti-moisture ability of the anti-moisture layer is superior to the anti-moisture ability of both the planarization layer and the second bank. 15. The apparatus according to claim 11 , wherein the anti-moisture layer includes at least two stepped portions. 16. An apparatus comprising: an array of thin-film transistors (TFTs) that drive organic light emitting elements including a first electrode and a second electrode at a display area of a substrate including an interlayer dielectric, the interlayer dielectric protruding into a non-display area of the substrate surrounding the display area; a planarization layer covering the array of TFTs in the display area and including a portion protruded into the non-display area; a first bank disposed only in the display area to divide a plurality of pixels; a second bank on the planarization layer at a boundary between the non-display area and the display area; an anti-moisture layer disposed only in the non-display area, the anti-moisture layer covering side and upper surfaces of a portion of the second bank corresponding to the non-display area and side and upper surfaces of the protruded portion of the planarization layer in the non-display area to reduce moisture permeation through the second bank and the protruded portion of planarization layer in the non-display area; a passivation layer on the anti-moisture layer, the passivation layer covering an upper surface of the anti-moisture layer and the second bank in the non-display area, and an upper surface of the first bank in the display area; an organic layer on the passivation layer; and an inorganic layer on the organic layer, wherein the anti-moisture layer is formed of an inorganic material and the passivation layer is formed of a same material of the anti-moisture layer, wherein the anti-moisture layer is disposed between the second electrode and the second bank, and wherein the anti-moisture layer contacts a lower surface of the second electrode, the side and upper surfaces of the portion of the second bank, and the side and upper surfaces of the protruded portion of the planarization layer, a side surface of the interlayer dielectric, and a lower surface of the passivation layer. 17. The apparatus of claim 16 , wherein the anti-moisture layer exten
Electricity · mapped topic
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