Audio processing device

US10062391B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10062391-B2
Application numberUS-201615391980-A
CountryUS
Kind codeB2
Filing dateDec 28, 2016
Priority dateJan 6, 2016
Publication dateAug 28, 2018
Grant dateAug 28, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An AV receiver 1 includes a mute circuit 5 that mutes output from a DAC 4, a detection circuit 6 that detects that a digital audio signal is zero data and supplies a detection signal, a microcomputer 2 that supplies a control signal at timing switching from PCM data to DSD data before switches from PCM mode that the DAC 4 converts PCM data into an analog audio signal to DSD mode that the DAC 4 converts DSD data into the analog audio signal, and an AND circuit 7 that activates the mute circuit 5 in case that the detection signal from the detection circuit 6 and the control signal from the microcomputer 2 are supplied.

First claim

Opening claim text (preview).

What is claimed is: 1. An audio processing device comprising: a D/A converter that converts a first digital audio signal and a second digital audio signal in which data format is different from the first digital audio signal into an analog audio signal; a mute circuit that mutes output from the D/A converter; a detection circuit that detects that a digital audio signal is a zero signal and supplies a detection signal; a controller that supplies a control signal at timing switching from the first digital audio signal to the second digital audio signal before switching the D/A converter from a first mode that the D/A converter converts the first digital audio signal into the analog audio signal to a second mode that the D/A converter converts the second digital audio signal into the analog audio signal; and a mute controller that activates the mute circuit in case that the detection signal from the detection circuit and the control signal from the controller are supplied to the mute controller. 2. The audio processing device according to claim 1 , wherein the detection circuit supplies a high level signal as the detection signal, the controller supplies a high level signal as the control signal, the mute controller is an AND circuit that calculates logical AND of the signal supplied from the detection circuit and the signal supplied from the controller, and the mute circuit mutes output from the D/A converter when the high level signal is supplied to the mute circuit from the mute controller. 3. The audio processing device according to claim 1 , wherein the detection circuit supplies a high level signal as the detection signal, the controller supplies a high level signal as the control signal, the mute controller is a three state buffer to which the signal that is supplied from the detection circuit and the signal that is supplied from the controller are input, and the mute circuit mutes output from the D/A converter when the high level signal is supplied to the mute circuit from the mute controller. 4. The audio processing device according to claim 1 , wherein the detection circuit has an npn type bipolar transistor, the digital audio signal is input to a base of the bipolar transistor, a collector of the bipolar transistor is connected to a power source via a resistor, an emitter of the bipolar transistor is connected to a ground potential, and output of the detection circuit is between the resistor and the collector of the bipolar transistor. 5. The audio processing device according to claim 1 , wherein the controller switches the D/A converter from the first mode to the second mode after it supplies the control signal. 6. The audio processing device according to of claim 1 , wherein the first digital audio signal is pulse-code modulation data, and the second digital signal is direct stream digital signal. 7. An audio processing device comprising: a D/A converter that converts a first digital audio signal and a second digital audio signal in which data format is different from the first digital audio signal into an analog audio signal; a mute circuit that mutes output from the D/A converter; a detection circuit that detects that a digital audio signal is a zero signal and supplies a detection signal; a controller that switches the D/A converter from a second mode that the D/A converter converts the second digital audio signal into the analog audio signal to a first mode that the D/A converter converts the first digital audio signal into the analog audio signal at timing switching from the second digital audio signal to the first digital audio signal after the controller outputs a control signal in case that the detection signal is supplied to the controller; and a mute controller that activates the mute circuit in case that the detection signal form from the detection circuit and the control signal from the controller are supplied to the mute controller.

Assignees

Inventors

Classifications

  • Muting amplifier when no signal is present · CPC title

  • in amplifiers suitable for low-frequencies, e.g. audio amplifiers (H03G3/32, H03G3/34 take precedence) · CPC title

  • Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

  • Noise filtering · CPC title

  • H03M1/0872Primary

    by disabling changes in the output during the transitions, e.g. by holding or latching · CPC title

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Frequently asked questions

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What does patent US10062391B2 cover?
An AV receiver 1 includes a mute circuit 5 that mutes output from a DAC 4, a detection circuit 6 that detects that a digital audio signal is zero data and supplies a detection signal, a microcomputer 2 that supplies a control signal at timing switching from PCM data to DSD data before switches from PCM mode that the DAC 4 converts PCM data into an analog audio signal to DSD mode that the DAC 4 …
Who is the assignee on this patent?
Onkyo Kk
What technology area does this patent fall under?
Primary CPC classification G10L21/0208. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 28 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).