Techniques for handling queued interrupts in a data processing system based on a saturation value

Patent metadata

Field	Value
Publication number	US-10061723-B2
Application number	US-201615340076-A
Country	US
Kind code	B2
Filing date	Nov 1, 2016
Priority date	Nov 16, 2015
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A technique for handling queued interrupts includes accumulating, by an interrupt routing controller (IRC), respective backlog counts for respective event paths. The background counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads upon which respective target interrupt handlers execute. An increment backlog (IB) message is received by the IRC. In response to receiving the IB message, the IRC determines an associated saturate value for an event path specified in the IB message. The IRC increments an associated backlog count for the event path specified in the IB message as long as the associated backlog count does not exceed the associated saturate value.

First claim

What is claimed is:

1. A method of handling queued interrupts, comprising:
accumulating, by an interrupt routing controller (IRC), respective backlog counts for respective event paths, wherein the backlog counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads upon which respective target interrupt handlers execute;
receiving, by the IRC, an increment backlog (IB) message;
in response to receiving the IB message, determining, by the IRC, an associated saturate value for an event path specified in the IB message;
incrementing, by the IRC, an associated backlog count for the event path specified in the IB message as long as the associated backlog count does not exceed the associated saturate value;
in response to a lowering of an operating priority of a VP thread, receiving, by the IRC, a scan backlog (SB) message that identifies the VP thread and specifies a current operating priority for the VP thread;
in response to receiving the SB message, scanning, by the IRC, a linked list of event paths associated with the VP thread to search for backlog events that have a higher priority than the current operating priority for the VP thread; and
in response to a backlog event being located that has a higher priority than the current operating priority of the VP thread, initiating, by the IRC, an interrupt to the VP thread starting with a highest priority event path and decrementing, by the IRC, the backlog count for the VP thread.

2. The method of claim 1 , wherein links for the linked list of event paths are stored in entries of an event notification descriptor table (ENDT).

3. The method of claim 1 , wherein the IRC interrupts the VP thread by building and issuing an event notification message to an interrupt presentation controller (IPC) on a memory I/O bus.

4. The method of claim 1 , wherein a separate one of the backlog counts is maintained for each of the event paths.

5. The method of claim 1 , wherein the IB message is received in response to the VP thread not being dispatched or the operating priority of the VP thread being at a higher priority than an event priority.

6. The method of claim 1 , further comprising:
receiving, by the IRC, a redistribute message that specifies an event path number;
building, by the IRC, an event notification message for an entry in an event notification descriptor table (ENDT) identified by the event path number; and
issuing, by the IRC, the event notification message on a memory I/O bus.

7. A processing unit for a multithreaded data processing system, the processing unit comprising:
an interrupt source controller (ISC);
an interrupt presentation controller (IPC); and
an interrupt routing controller (IRC) coupled to the ISC and the IPC, wherein the IRC is configured to:
accumulate respective backlog counts for respective event paths, wherein the backlog counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads upon which respective target interrupt handlers execute;
receive an increment backlog (IB) message from the IPC; in response to receiving the D 3 message, determine an associated saturate value for an event path specified in the D 3 message;
increment an associated backlog count for the event path specified in the D 3 message as long as the associated backlog count does not exceed the associated saturate value;
in response to a lowering of an operating priority of a VP thread, receive a scan backlog (SB) message that identifies the VP thread and specifies a current operating priority for the VP thread;
in response to receiving the SB message, can a linked list of event paths associated with the VP thread to search for backlog events that have a higher priority than the current operating priority for the VP thread; and
in response to a backlog event being located that has a higher priority than the current operating priority of the VP thread, initiate n interrupt to the VP thread starting with a highest priority event path and decrementing, by the IRC, the backlog count for the VP thread.

8. The processing unit of claim 7 , wherein links for the linked list of event paths are stored in entries of an event notification descriptor table (ENDT).

9. The processing unit of claim 7 , wherein the IRC interrupts the VP thread by building and issuing an event notification message to the IPC on a memory I/O bus.

10. The processing unit of claim 7 , wherein a separate one of the backlog counts is maintained for each of the event paths.

11. The processing unit of claim 7 , wherein the IB message is received in response to the VP thread not being dispatched or the operating priority of the VP thread being at a higher priority than an event priority.

12. The processing unit of claim 7 , wherein the IRC is further configured to:
receive a redistribute message that specifies an event path number;
build an event notification message for an entry in an event notification descriptor table (ENDT) identified by the event path number; and
issue the event notification message on a memory I/O bus.

13. A design structure tangibly embodied in a computer-readable storage device for designing, manufacturing, or testing an integrated circuit, wherein the design structure comprises:
an interrupt presentation controller (IPC); and
an interrupt routing controller (IRC) coupled to the IPC, wherein the IRC is configured to:
accumulate respective backlog counts for respective event paths, wherein the backlog counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads upon which respective target interrupt handlers execute;
receive an increment backlog (IB) message from the IPC; in response to receiving the D 3 message, determine an associated saturate value for an event path specified in the D 3 message;
increment an associated backlog count for the event path specified in the D 3 message as long as the associated backlog count does not exceed the associated saturate value;
in response to a lowering of an operating priority of a VP thread, receive a scan backlog (SB) message that identifies the VP thread and specifies a current operating priority for the VP thread;
in response to receiving the SB message, scan a linked list of event paths associated with the VP thread to search for backlog events that have a higher priority than the current operating priority for the VP thread; and
in response to a backlog event being located that has a higher priority than the current operating priority of the VP thread, initiate an interrupt to the VP thread starting with a highest priority event path and decrement the backlog count for the VP thread.

14. The design structure of claim 13 , wherein links for the linked list of event paths are stored in entries of an event notification descriptor table (ENDT).

15. The design structure of claim 13 , wherein the IRC interrupts the VP thread by building and issuing an event notification message to the IPC on a memory I/O bus.

16. The design structure of claim 13 , wherein a separate one of the backlog counts is maintained for each of the event paths, and wherein the IB message is received in response to the VP thread not being dispatched or the operating priority of the VP thread being at a higher priority than an event priority.

17. The design structure of claim 13 , wherein the IRC is further configured to:
receive a redistribute message that specifies an event path number;
build an event notification message for an entry in a

Assignees

• IBM

Inventors

• Arndt Richard L
• Auernhammer Florian A

Classifications

• G06F9/4812 Primary

  by interrupt, e.g. masked · CPC title

• G06F13/26 Primary

  with priority control · CPC title

• G06F13/28

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• G06F2212/70

  Details relating to dynamic memory management · CPC title