Protecting secret state from memory attacks

Patent metadata

Field	Value
Publication number	US-10061718-B2
Application number	US-201213535578-A
Country	US
Kind code	B2
Filing date	Jun 28, 2012
Priority date	Jun 28, 2012
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

Described is a technology by which classes of memory attacks are prevented, including cold boot attacks, DMA attacks, and bus monitoring attacks. In general, secret state such as an AES key and an AES round block are maintained in on-SoC secure storage, such as a cache. Corresponding cache locations are locked to prevent eviction to unsecure storage. AES tables are accessed only in the on-SoC secure storage, to prevent access patterns from being observed. Also described is securely preparing for an interrupt-based context switch during AES round computations and securely resuming from a context switch without needing to repeat any already completed round or round of computations.

First claim

What is claimed is:

1. In a computing environment, a method comprising:
maintaining protected data in on-System on Chip (SOC) secure storage, wherein the protected data comprises at least a secret state and access-protected data;
evicting at least some portion of the access-protected data to unsecure storage, the secret state not being allowed to be written to unsecure storage, the access-protected data only being accessed while stored in the on-SoC secure storage;
performing…

Assignees

• Colp Patrick J
• Raj Himanshu
• Saroiu Stefan
• Wolman Alastair
• Microsoft Technology Licensing Llc

Inventors

• Colp Patrick J
• Raj Himanshu
• Saroiu Stefan
• Wolman Alastair

Classifications

• G06F12/1425 Primary

  Physics · mapped topic

• G06F21/78

  Physics · mapped topic

• G06F21/79

  Physics · mapped topic