Architectural extensions for memory mirroring at page granularity on demand
US-2024152281-A1 · May 9, 2024 · US
US10061534B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10061534-B2 |
| Application number | US-201113994150-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 1, 2011 |
| Priority date | Dec 1, 2011 |
| Publication date | Aug 28, 2018 |
| Grant date | Aug 28, 2018 |
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Method, apparatus and systems for performing hardware-based memory migration and copy operations. Under the method, a first portion of memory in a computer system accessed via a first memory controller is migrated or copied to a second portion of memory accessed via a second memory controller using a hardware-based scheme that is implemented independent of and transparent to software running on a computer system. The memory migration and/or copy operations can be used to initialize a memory mirror configuration under which data in first and second portions of memory are mirrored, and to perform memory migration operations in which data in a first portion of memory is migrated to a second portion of memory under the control of hardware in a manner in which the memory migration can be performed during run-time without a significant reduction in performance. In addition, poison data indicating failed cache lines may be migrated or copied such that data corresponding to migrated or copied poisoned cache lines are not used.
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What is claimed is: 1. A method, comprising: performing memory access operations with a first and second memory controller integrated on a processor in a computer system including an operating system running on the computer system in system memory and system BIOS, the first and second memory controller being implemented to respectively access first and second portions of system memory, each of the first and second portions of system memory including respective sets of one or more…
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